HVDC Data Processing Device Counter-Based MIS Transmission

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Solution Overview

Problem

In high voltage direct current (HVDC) transmission systems, existing data transmission methods face limitations when intermediate measuring interface systems (MIS) are out of order or empty, leading to data transmission errors and bottlenecks due to Daisy-Chain style signal approval and time division multiplexing schemes.

Innovation Solution

A data processing device that includes a plurality of measuring interface systems (MIS) and an optical distribution module (ODM) with a counter-based mechanism, where MISs transmit data through a bus, and the ODM's data transmission completion signal increments counters, allowing the next MIS to transmit data, ensuring continuous data flow even if one MIS is out of order or empty.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If Daisy-Chain style signal approval is used for data transmission among MISs, then data transmission control is simplified, but data transmission reliability deteriorates when intermediate MIS is out of order

Engineering Contradiction:
Improvedata transmission control complexityVSAvoiddata transmission reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the Daisy-Chain style signal approval into two independent parts: (1) data transmission control signal approval among MISs, and (2) data transmission completion signal from ODM to MISs. This segmentation allows the system to maintain simplified control while improving reliability, as the completion signal can bypass failed MISs and directly notify the ODM, preventing complete transmission failure when an intermediate MIS is out of order.

Inventive Principle:
Principle #1Segmentation

2Productivity

If time division multiplexing (TDM) is used for data transmission among multiple MISs, then bus resource utilization is improved, but data transmission errors increase due to sequential transmission bottlenecks

Engineering Contradiction:
Improvebus resource utilizationVSAvoiddata transmission error rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a feedback mechanism where the ODM sends data transmission completion signals back to the MISs. This feedback allows MISs to know when their data transmission is complete and when the bus is available for the next transmission, enabling efficient TDM operation while reducing errors through proper timing and acknowledgment of successful transmissions.

Inventive Principle:
Principle #23Feedback

3Reliability

If intermediate MIS is out of order in Daisy-Chain style transmission, then data transmission from that MIS fails, but following MISs cannot transmit data either

Engineering Contradiction:
Improveindividual MIS transmission reliabilityVSAvoidoverall data transmission throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces the ODM as an intermediary that receives completion signals directly from the bus without requiring sequential approval from each MIS. When an intermediate MIS fails, the ODM can still receive data from subsequent MISs that gain bus access through other means, and the completion signal path remains intact, allowing the system to maintain overall productivity despite individual MIS failures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3073606B1Data processing device for high voltage direct current transmission system
Publication Date: 2019.05.29 LSIS CO LTD
  • EP3073606B1 patent drawingFigure 1
  • EP3073606B1 patent drawingFigure 2
  • EP3073606B1 patent drawingFigure 3

AI summary

A data processing device for a high voltage direct current (HVDC) transmission system is provided. The data processing device includes a plurality of measuring interface systems (MIS) for measuring a voltage or current in an HVDC transmission system; a bus for transmitting data on the plurality of MISs; and an optical distribution module (ODM) transmitting the data transmitted through the bus to the HVDC transmission system, wherein the plurality of MISs increases counter values according to a data transmission completion signal of the ODM, and an MIS corresponding to the counter value among the plurality of MISs transmits data to the ODM through the bus.