HVDC Dual Controller Buffer Sharing for PI Error Convergence
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In HVDC systems using proportional-integral (PI) control, errors in integral values between dual controllers lead to control value divergence, causing system malfunctions during switching.
Innovation Solution
A dual control apparatus and method where each controller shares error values through buffers, allowing proportional and integral control using stored error values, eliminating deviation between control signals and enabling seamless switching without synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If dual controllers operate independently in active/active manner, then switching speed is improved, but control value divergence occurs due to accumulated integral errors
Solution Approach 1:
The patent merges the integral error values from both controllers by having them share a common buffer memory. The first controller stores its integral error in a first buffer, and the second controller stores its integral error in a second buffer. Both controllers read from and write to these shared buffers, ensuring that both controllers use the same accumulated error value for PI control calculations, thereby preventing control value divergence while maintaining independent operation
Solution Approach 2:
The buffer memory acts as an intermediary between the two controllers. Instead of controllers directly communicating or synchronizing their internal states, they both interact with the shared buffer which mediates the exchange of integral error values. This intermediary mechanism allows both controllers to operate independently while maintaining consistency through the shared error accumulation
2Ease of operation
If controllers perform independent PI control calculations, then operational independence is improved, but integral error accumulation divergence occurs
Solution Approach 1:
The patent combines the integral error storage functionality into a shared buffer system that both controllers access. While controllers maintain operational independence in performing PI control calculations, they both read from and write to the same buffer memory for integral error values, ensuring that both produce accurate and consistent control signals without requiring direct coordination
Data Source
AI summary
Provided is a dual control apparatus and control method for a high voltage direct current (HVDC) system. The dual control apparatus comprises: a first controller and a second controller operated in a dual manner, the first controller and the second controller each including: a deviation calculation unit calculating a deviation between a target value and a control value; a PI controller performing proportional control and integral control on the deviation; a first buffer storing an error value for the integral control performed by the PI controller of a relevant one of the first and second controllers; and a second buffer storing an error value for the integral control performed by the PI controller of a remaining one of the first and second controllers.