HVDC Control Loop Modulus Reduction via Excessive Regeneration Detection

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Solution Overview

Problem

High Voltage Direct Current (HVDC) systems face instability due to excessive time delay in sensor measurements, which can lead to poor time-domain response and instability in closed-loop systems, especially in wide-area damping controllers (WADCs), and are vulnerable to cyber-attacks like GPS spoofing that introduce phase delays.

Innovation Solution

The implementation of an Excessive Regeneration Detector (ERD) block that adjusts the HVDC feedback compensator block output signal by discretizing, filtering, and calculating variances to determine a variable gain, which is then used to adjust the HVDC feedback compensator output signal, reducing the control loop modulus and maintaining system stability despite excessive time delays and potential cyber-attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If wide-area damping controllers are used in HVDC systems, then power system stability is improved, but excessive time delay in sensor measurements causes control loop instability

Engineering Contradiction:
Improvepower system stabilityVSAvoidsensor measurement time delay
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent implements a variable loop gain controller that dynamically adjusts the controller gain based on the detected level of excessive regeneration. The gain transitions from a fixed value to a time-varying parameter that adapts to changing system conditions, allowing the controller to maintain stability despite time delays by reducing gain when regeneration exceeds thresholds

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a feedback mechanism where the controller monitors its own output signal for excessive regeneration and uses this information to adjust the gain. The feedback loop detects when the controller output exceeds predefined thresholds and triggers gain reduction, creating a self-regulating system that responds to instability conditions

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If controller gain is increased to improve damping performance, then oscillation suppression is enhanced, but control loop modulus increases causing instability under time delay

Engineering Contradiction:
Improveoscillation damping performanceVSAvoidcontrol loop stability under time delay
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent changes the controller gain parameter from a fixed high value to a variable parameter that adapts based on system conditions. When excessive regeneration is detected, the gain is reduced according to a predefined schedule, allowing the system to maintain high damping performance during normal operation while ensuring stability when time delays occur

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If GPS synchronization is used for wide-area control, then coordination between remote sensors is improved, but vulnerability to GPS spoofing attacks increases

Engineering Contradiction:
Improvesensor coordination accuracyVSAvoidcyber-attack vulnerability
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of GPS spoofing attacks into a detectable condition by monitoring for excessive regeneration. When GPS spoofing introduces phase delays, the controller detects the resulting excessive regeneration and responds by reducing gain, thereby transforming a security vulnerability into a detectable and manageable control condition

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS10355485B2Variable loop gain using excessive regeneration for a delayed wide-area control system
Publication Date: 2019.07.16 UNIVERSITY OF WYOMING
  • US10355485B2 patent drawing
  • US10355485B2 patent drawing
  • US10355485B2 patent drawing

AI summary

Disclosed are methods and systems for adjusting a High Voltage Direct Current (HVDC) compensator output signal to an HVDC system to reduce control loop modulus due to excessive time delay of sensor measurements. Two different time windows, a Short-Time Variance Window (STVW) and an Extended-Time Variance Window (ETVW) may be examined for detection of increased energy. To detect increased energy the HVDC compensator output signal may be passed through a bandpass filter, then variances for the STVW and ETVW may be generated to produce corresponding test statistics. The STVW and ETVW test statistics may be compared to hypothesis test thresholds and have binary logic based on the hypothesis test comparisons used to generate a gain. The gain may then be multiplied times the original HVDC feedback compensator output such that the adjusted HVDC feedback compensator output reduces the control loop modulus when applied to the HVDC system.