HVIC Element Separation for Negative Voltage Surge Suppression
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Solution Overview
Problem
Conventional high-voltage integrated circuit (HVIC) devices face malfunctions due to negative voltage surges, particularly when driving three-phase inverters, as parasitic inductance and wiring issues lead to undershoots at the VS terminal, and existing solutions either increase chip size or restrict design flexibility by requiring additional components like clamping diodes or malfunction detecting circuits.
Innovation Solution
The semiconductor integrated circuit device incorporates a p−-type opening between high-potential-side regions and circuit units, which reduces the flow of electron carriers during negative voltage surges by acting as a potential barrier, and omits GND contact regions in the interphase region to minimize hole carrier flow, thereby preventing malfunctions without increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional components like clamping diodes or malfunction detecting circuits are added to suppress negative voltage surges, then reliability is improved, but device complexity and chip area increase
Solution Approach 1:
The patent extracts and eliminates the need for additional protective components by using the existing semiconductor substrate structure. The p-type opening is formed directly in the semiconductor substrate at the interphase region, utilizing the substrate's own material properties to suppress negative voltage surges without requiring external clamping diodes or malfunction detecting circuits
Solution Approach 2:
The semiconductor substrate serves its own protective function through the p-type opening structure. The opening creates a potential barrier that automatically suppresses electron carrier flow during negative voltage surges, making the system self-protecting without external components
2Reliability
If additional components like clamping diodes or malfunction detecting circuits are added to suppress negative voltage surges, then reliability is improved, but manufacturing cost increases
Solution Approach 1:
The patent removes the need for separate protective components by integrating the surge suppression function directly into the semiconductor substrate through the p-type opening structure, thereby reducing component count and manufacturing cost
Solution Approach 2:
The protective function against negative voltage surges is merged with the existing semiconductor substrate structure. The p-type opening is formed as part of the substrate fabrication process, combining the substrate's structural role with its protective function
3Reliability
If the chip area is increased to accommodate additional protective components, then reliability is improved, but integration density decreases
Solution Approach 1:
The patent extracts the protective function from separate components and integrates it into the existing chip structure through the p-type opening, eliminating the need for additional chip area to accommodate external protective devices
Solution Approach 2:
The semiconductor substrate performs multiple functions: it provides the structural base for the circuit and simultaneously serves as the protective element through the p-type opening. This multi-functionality allows reliability improvement without increasing chip area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses electron carrier flow between high-potential-side regions, reducing the risk of malfunction and maintaining design flexibility while avoiding the need for additional components that increase chip size.
Implementation Method 1
incorporates a p−-type opening between high-potential-side regions and circuit units, which reduces the flow of electron carriers during negative voltage surges by acting as a potential barrier
Implementation Method 2
omits GND contact regions in the interphase region to minimize hole carrier flow
Data Source
AI summary
An HVIC is a gate driver IC that drives a three-phase inverter and includes high-potential-side regions for three phases on a single semiconductor substrate. The high-potential-side region includes an n-type region and has a potential that is fixed at a power source voltage potential through a VB contact region in the n-type region. The high-potential-side region has a high-side driving circuit that drives an upper arm element of the inverter. An interphase region between adjacent high-potential-side regions has no GND contact region and no GND contact electrode arranged therein, and has only a p-type region at a ground potential constituting a low-potential-side region. The high-potential-side region of one phase has a p−-type opening between the high-side driving circuit of thereof and the high-side driving circuit or the GND contact region of an adjacent high-potential-side region that is of another phase and sandwiches the interphase region therebetween.