HVIC Level Shifter and Boost Diode Integration in Junction Termination
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Solution Overview
Problem
Current high-voltage integrated circuits (HVICs) require external boost circuits, which occupy additional space and increase the size of the device package due to the need for external boost circuitry and connections.
Innovation Solution
Integrating the boost structure into the substrate area of the power device, specifically within the isolation insulator structures, and wrapping it around the high voltage well tub to maximize the boost structure area, while implementing a deep buried layer to enhance breakdown voltage and robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If external boost circuits are used in HVIC devices, then the device can achieve required voltage boosting function, but the device package size increases due to extra space for external boost circuitry and connections
Solution Approach 1:
The patent combines the boost diode function with the junction termination region (JTR) of the LDMOS transistor by integrating a deep buried N-type layer into the JTR structure. This merging eliminates the need for separate external boost circuits and their associated packaging, thereby reducing device package size while maintaining voltage boosting capability.
Solution Approach 2:
The junction termination region is designed to serve dual functions: its traditional role in voltage breakdown protection and an additional boost diode function through the integrated deep buried N-type layer. This multi-functionality allows the same structural region to provide both protection and voltage boosting, eliminating dedicated external boost circuitry.
2Area of stationary object
If the boost structure is integrated into the substrate area within isolation insulator structures, then the device package size is reduced, but the manufacturing complexity increases
Solution Approach 1:
The deep buried N-type layer is formed during the preliminary substrate preparation stage, before the LDMOS transistor structures are built. This preliminary action integrates the boost function into the substrate itself, allowing subsequent processing steps to focus on standard transistor fabrication without additional complex steps.
Solution Approach 2:
The boost structure is localized within specific isolation insulator regions between transistor fingers, rather than requiring global structural modifications. This localized integration allows standard manufacturing processes to be used in most areas while adding the boost function only where needed, minimizing impact on overall manufacturing complexity.
Data Source
AI summary
A power device, circuit and method of making are described. The power device circuit includes a semiconductor substrate composition having a substrate layer of a first conductivity type wherein the first conductivity type is opposite a second conductivity type. Two or more lateral double diffused metal oxide semiconductor (LDMOS) devices are formed in the substrate layer and integrated into an isolation region of a high voltage well, wherein each LDMOS is isolated from a power device substrate area by an isolator structure formed from the substrate layer. One or more boost structures are integrated into the isolation region of the high voltage well wherein the one or more boost structures are in contact with the high voltage well and extend into the isolation region of the high voltage well.