HVMOS Channel Doping for Kirk Effect Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-voltage metal oxide semiconductor (HVMOS) devices face issues such as current leakage and the Kirk effect due to reduced channel diffusion region sizes, leading to potential device failure and malfunction.
Innovation Solution
The semiconductor structure incorporates a third ion implantation region of a second conductivity type within the gate layer, covering the side portions of the channel diffusion region, allowing current to pass through the center region with lower threshold voltage instead of the corner regions, thereby minimizing the Kirk effect and preventing device damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the channel diffusion region size is reduced to shrink device dimensions, then device miniaturization is achieved, but current leakage and Kirk effect increase
Solution Approach 1:
The patent applies local quality by creating a third ion implantation region with different conductivity type (second conductivity type) specifically at the corner regions of the channel diffusion region, while the center region maintains the original doping profile. This localized modification creates different electrical properties in different parts of the channel, allowing corner regions to have higher threshold voltage to prevent Kirk effect while the center region maintains lower threshold voltage for proper current flow.
2Volume of moving object
If the channel diffusion region size is reduced, then device dimensions are minimized, but current leakage increases
Solution Approach 1:
The third ion implantation region is selectively formed at the corner regions of the channel diffusion region to address current leakage locally. By doping these corner regions with a different conductivity type, the patent creates higher threshold voltage zones that prevent carrier generation and current leakage at these vulnerable locations, while leaving the center channel region unchanged to maintain proper device operation.
3Reliability
If ion implantation is performed to prevent Kirk effect, then device reliability improves, but device complexity increases
Solution Approach 1:
The patent segments the channel diffusion region into distinct zones: corner regions receiving third ion implantation and center regions maintaining original doping. This segmentation allows independent optimization of different regions - corners for preventing Kirk effect and center for maintaining low threshold voltage - without requiring complete restructuring of the entire device.
Solution Approach 2:
The third ion implantation region is selectively formed at the corner regions of the channel diffusion region to address current leakage locally. By doping these corner regions with a different conductivity type, the patent creates higher threshold voltage zones that prevent carrier generation and current leakage at these vulnerable locations, while leaving the center channel region unchanged to maintain proper device operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the Kirk effect and prevents device damage by ensuring current flows through the center region with lower threshold voltage, significantly reducing bulk current and minimizing device failure.
Implementation Method 1
a third ion implantation region of a second conductivity type is formed in the gate layer. The third ion implantation region is located above and covers two side portions of the channel diffusion region
Data Source
AI summary
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate; a first and a second ion implantation regions of a first conductive type; a source and a drain diffusion regions formed in the first and the second ion implantation regions respectively; a channel diffusion region formed between the first and the second ion implantation regions; a gate layer disposed above the channel diffusion region and located between the source and the drain diffusion regions; and a third ion implantation region of a second conductive type formed in the gate layer, which extends in a first direction. The third ion implantation region is located above and covers two side portions of the channel diffusion region, the two side portions are adjacent to two edges, extending in a second direction perpendicular to the first direction, of the channel diffusion region.