HVPMOS Bulk Resistance Evaluation for Faster Reliability Rules
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Solution Overview
Problem
Existing reliability tests for high-voltage metal-oxide-semiconductor (HVMOS) devices, such as TDDB tests, are time-consuming and do not support the establishment of design rules, making it difficult to keep pace with product design cycles and guide the design process effectively.
Innovation Solution
A method is provided to quickly evaluate the reliability of HVMOS devices by using bulk resistances as indices, specifically by measuring and calculating bulk resistances Rb and current gains β, which are correlated with the active-region-to-guard-ring spacings, to determine the reliability of HVMOS devices and establish design rules for spacings A, B, C, G1, and G2, thereby guiding the design of HVMOS devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TDDB tests are performed by stressing HVMOS devices with currents at elevated temperatures until failure, then reliability evaluation is achieved, but the test time is excessively long and cannot keep pace with product design cycles
Solution Approach 1:
The patent applies preliminary action by measuring bulk resistance early in the device lifecycle before actual operation. This early measurement allows reliability assessment to be performed without waiting for time-consuming TDDB tests to complete, effectively performing the reliability evaluation action in advance
Solution Approach 2:
The patent substitutes the mechanical/stress-based TDDB testing system with an electrical measurement system. Instead of applying high stress and waiting for physical failure, the invention uses electrical resistance measurements to infer reliability, replacing a time-intensive physical degradation process with a rapid electrical characterization method
2Reliability
If conventional TDDB tests are used, then reliability data is obtained, but the tests do not support the establishment of design rules and cannot guide the design process
Solution Approach 1:
The patent implements feedback by establishing a direct relationship between bulk resistance measurements and design parameters such as guard ring spacing. The measured resistance values provide feedback that can be used to adjust and optimize design rules, creating a closed-loop system where measurement results directly inform design decisions
Solution Approach 2:
The patent applies parameter changes by using bulk resistance as a measurable parameter that correlates with structural design parameters. By changing the measurement approach from endpoint failure analysis to continuous resistance monitoring, the invention enables quantitative analysis that supports systematic design rule development
Data Source
AI summary
A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.