Hardware Clock Synchronisation via Software Error Feedback
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In time-sensitive applications like wireless media systems, clock synchronization between devices is challenging due to clock drift caused by environmental factors and differences in clock rates, leading to out-of-sync media playback and inaccurate time-stamping.
Innovation Solution
A device with a hardware clock and a software clock that adjusts its frequency to synchronize with another device's clock, using a fractional phase-locked loop and proportional-integral controller to estimate and correct synchronization errors, ensuring media playback is synchronized across devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If clocks are initially set accurately, then time synchronisation is achieved, but clock drift causes synchronisation to deteriorate over time
Solution Approach 1:
The system continuously measures the time difference between the first software clock and the second software clock, and uses this feedback to automatically adjust the hardware clock frequency. This closed-loop feedback mechanism ensures that synchronisation accuracy is maintained over extended periods by compensating for clock drift in real-time.
Solution Approach 2:
The system dynamically changes the hardware clock frequency parameter based on the measured synchronisation error. By adjusting the clock frequency rather than just software timestamps, the system addresses the root cause of drift and maintains synchronisation over long durations.
2Measurement precision
If hardware clock frequency is adjusted to correct synchronisation error, then time synchronisation is improved, but media playback rate may become inaccurate
Solution Approach 1:
The system separates the clock synchronisation function from the media playback control function. The hardware clock is adjusted for synchronisation purposes, while a separate software clock and timestamp mechanism handles media playback timing. This segmentation allows independent optimisation of both functions without mutual interference.
Solution Approach 2:
The system introduces a software clock as an intermediary between the adjusted hardware clock and the media playback system. The software clock absorbs the frequency adjustments needed for synchronisation, while providing stable timing references for media playback, thus protecting playback accuracy from hardware clock adjustments.
3Adaptability or versatility
If software clock is used for time derivation, then flexibility in time scale is achieved, but clock drift occurs due to hardware variations
Solution Approach 1:
The system continuously monitors the drift between the software clock (derived from hardware clock) and the remote software clock, and uses this feedback to adjust the hardware clock frequency. This closed-loop control compensates for hardware variations and maintains long-term accuracy while preserving software clock flexibility.
Solution Approach 2:
The system makes the hardware clock frequency dynamic rather than fixed, allowing it to be adjusted in response to measured drift conditions. This dynamic adjustment capability enables the system to maintain accuracy across varying environmental conditions while the software clock retains its flexibility for different time scales.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution maintains accurate synchronization of clocks and media playback rates across devices, even in wireless environments, preventing out-of-sync issues and ensuring reliable time-sensitive tasks.
Implementation Method 1
The hardware clock may comprise a fractional phase-locked loop (PLL).
Implementation Method 2
the controller is configured to provide the time difference to a proportional-integral (PI) controller so as to estimate a frequency difference
Data Source
AI summary
A first device operates synchronously with a second device, and includes a hardware clock having an adjustable clock frequency and a software clock configured to derive time in dependence on the hardware clock. A controller determines a synchronisation error between the software clock and a clock of the second device, and adjusts the clock frequency of the hardware clock in dependence on the synchronisation error so as to synchronise the hardware clock to a hardware clock of the second device.