Hardware Synchronization Circuit for Automotive Ethernet

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Solution Overview

Problem

Conventional IEEE standards for Ethernet switching, such as IEEE 802.1Q, are inadequate for audio and video streaming and control-type applications, particularly in maintaining synchronization across network nodes, which can lead to power consumption issues and delays in network operations.

Innovation Solution

Implementing a hardware synchronization circuit within switches and end nodes that processes IEEE 802.1AS frames independently of the Ethernet frame processor, allowing for continuous synchronization and reduced power consumption by performing calculations and operations in hardware rather than software.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If synchronization processing is performed in software (conventional approach), then device complexity is reduced, but power consumption increases and processing speed decreases

Engineering Contradiction:

Improvesynchronization processing speedVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces software-based synchronization processing with a dedicated hardware synchronization circuit that operates independently from the Ethernet frame processor. This hardware circuit includes specialized components such as a local clock, timestamp generators, and propagation delay calculators that perform synchronization functions in hardware, thereby reducing power consumption and increasing processing speed compared to software implementation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent segments the Ethernet device into two independent operational components: an Ethernet frame processor and a hardware synchronization circuit. The synchronization circuit can operate independently with its own power supply, allowing it to maintain synchronization functions even when the main Ethernet frame processor is powered down, thus reducing overall power consumption while maintaining synchronization productivity.

Inventive Principle:

Principle #1Segmentation

2Use of energy by moving object

If Ethernet frame processor is powered down to conserve energy, then power consumption decreases, but network synchronization is disrupted

Engineering Contradiction:

Improvepower consumptionVSAvoidnetwork synchronization

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent divides the Ethernet device into separable functional units with independent power supplies: the Ethernet frame processor and the hardware synchronization circuit. This segmentation allows the synchronization circuit to remain powered on independently while the main processor is powered down, maintaining synchronization reliability without consuming excessive power.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The hardware synchronization circuit is designed to be self-sufficient with its own local clock and processing capabilities, allowing it to maintain synchronization functions autonomously without requiring the main Ethernet frame processor to be active. This self-service capability ensures continuous synchronization operation even when the main processor is powered down.

Inventive Principle:

Principle #25Self-service

3Adaptability or versatility

If conventional IEEE 802.1Q standards are used, then device compatibility is maintained, but audio and video streaming synchronization requirements are not met

Engineering Contradiction:

Improvesupport for audio and video streamingVSAvoidsynchronization delay

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent implements hardware-level synchronization processing that operates independently from the software-based Ethernet frame processor. This hardware circuit performs timestamping, propagation delay calculation, and clock synchronization at the hardware level, providing the low-latency performance required for audio and video streaming applications while maintaining compatibility with standard Ethernet protocols.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP3260949B1An integrated circuit and method for processing synchronized network frames using a hardware synchronization circuit

Publication Date: 2020.09.02 NXP BV

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AI summary

An integrated circuit (IC) device and a method of operating thereof is disclosed. In the embodiment, the IC device includes an Ethernet frame processor, at least one Ethernet port coupled to the Ethernet frame processor, and a hardware synchronization circuit coupled to the Ethernet frame processor and to the at least one Ethernet port, the hardware synchronization circuit including a controller, a local clock, a media-independent peripheral coupled to the controller, and a media-dependent peripheral coupled to the media-independent peripheral, wherein power can be provided to the hardware synchronization circuit independent of the Ethernet frame processor.