Hybrid ADC Architecture for High-Speed and High-Resolution Digitizing
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Solution Overview
Problem
Current analog-to-digital converters (ADCs) face challenges in achieving both high speed and high resolution, making it difficult to effectively convert continuous analog input signals in test and measurement systems.
Innovation Solution
Combining a high-speed sampling ADC with a continuously integrating ADC, where the outputs are combined to leverage the high speed of the former and the linearity, noise, and resolution of the latter, with a digital filter matching their apertures and gains to minimize transition errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a high-speed sampling ADC is used, then the sampling rate is improved, but the resolution deteriorates
Solution Approach 1:
The patent combines a high-speed sampling ADC and a continuously integrating ADC into a single digitizer circuit. The sampling ADC provides high sampling rates while the integrating ADC provides high resolution and linearity. Their outputs are combined through a summing node to produce a final digital output that achieves both high speed and high resolution simultaneously, resolving the contradiction between sampling rate and resolution.
2Measurement precision
If a continuously integrating ADC is used, then the resolution is improved, but the sampling rate deteriorates
Solution Approach 1:
The patent merges the outputs of a continuously integrating ADC (providing high resolution) and a high-speed sampling ADC (providing high sampling rate) through a summing node. This combination allows the system to achieve both high resolution and high sampling rate simultaneously, resolving the contradiction between resolution and sampling rate.
3Measurement precision
If two different ADC methods are combined, then both high speed and high resolution are achieved, but the device complexity increases
Solution Approach 1:
The patent combines two ADC methods (sampling ADC and integrating ADC) in a unified circuit architecture where their outputs are summed at a common node. This merging approach achieves both high speed and high resolution while minimizing additional complexity by using a straightforward parallel structure with a single summing operation, rather than more complex sequential or switched architectures.
Data Source
AI summary
A digitizing circuit includes a port connectable to a device under test (DUT), an integrating analog-to-digital converter (ADC), a high-speed ADC, one or more processors to apply a digital filter to output samples of the high-speed ADC to produce filtered samples, find differences between the filtered samples and samples from the integrating ADC to produce error values, and add the error values to the output samples of the high-speed ADC. A method of producing a digital signal includes receiving an input analog signal at an integrating analog-to-digital converter (ADC) and a high-speed ADC, applying a digital filter to output samples of the high-speed ADC to produce filtered samples, the digital filter matched to timing and filtering of the integrating ADC, finding differences between the filtered samples to output samples of the integrating ADC to produce error values, and adding the error values to the output samples of the high-speed ADC.