Hybrid Address Mapping for Flash Memory Using Hash Tables

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current address mapping schemes for memory systems, such as those used in flash-based solid state drives, face challenges in balancing performance and memory requirements, particularly under random write workloads, as they either require excessive storage for page-level mapping or suffer from endurance issues with block-level mapping.

Innovation Solution

The proposed solution involves partitioning physical blocks into data blocks and log blocks, using a block-level mapping scheme for data blocks and a page-level mapping scheme for log blocks, with a hash table for the log blocks to maintain low memory requirements, and employing a hybrid-mapping scheme that dynamically allocates storage and reduces RAM usage through a partial hash table implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a page-level mapping scheme is used, then read and write performance is improved, but memory requirements increase significantly

Engineering Contradiction:
Improveread and write performanceVSAvoidmemory requirements
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The physical blocks are divided into two distinct types: data blocks for long-term storage and log blocks for temporary writes. This segmentation allows the system to apply different mapping strategies to different portions of the memory, reducing the overall memory overhead while maintaining performance for active operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different mapping schemes are applied to different regions: block-level mapping for data blocks and hash table-based page-level mapping for log blocks. This local differentiation optimizes each region for its specific function while minimizing total memory consumption.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If a block-level mapping scheme is used, then memory requirements are reduced, but endurance issues arise under random write workloads

Engineering Contradiction:
Improvememory requirementsVSAvoidendurance under random write
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

Data is first written to log blocks in a preliminary action before being moved to data blocks. This preliminary write operation absorbs the wear from random writes, protecting the main data blocks from excessive programming cycles and extending overall system endurance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Log blocks serve as an intermediary buffer between the host and data blocks. They absorb random write operations and facilitate gradual consolidation to data blocks, protecting the primary storage from direct exposure to write-intensive workloads.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If a hybrid-mapping scheme with partial hash table is used, then memory requirements are reduced, but system complexity increases

Engineering Contradiction:
Improvememory requirementsVSAvoidsystem complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Instead of implementing a complete page-level mapping for all blocks, the system applies hash table-based mapping only to log blocks and block-level mapping to data blocks. This partial application of the more complex mapping scheme reduces overhead while maintaining effectiveness for the most critical operations.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10884947B2Methods and memory systems for address mapping
Publication Date: 2021.01.05 SK HYNIX INC
  • US10884947B2 patent drawing
  • US10884947B2 patent drawing
  • US10884947B2 patent drawing

AI summary

Methods and systems are provided for an address mapping scheme using a hash table. A controller of a memory system partitions a plurality of physical blocks included in a memory device into a plurality of data blocks and a plurality of log blocks, translates a logical address to a physical address based on a block-level mapping scheme or a page-level mapping scheme using a hash table, and performs a read and/or write operation based on the translated physical address.