Hybrid Address Mapping for Flash Memory Write Performance
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Solution Overview
Problem
Current semiconductor memory devices face inefficiencies in merge operations due to the difference in block size between erase and write units, necessitating frequent merge operations to manage memory space effectively, particularly in flash memory devices where block mapping requires more memory space than page mapping.
Innovation Solution
Implementing a hybrid address mapping method that selectively uses block mapping for super sequential blocks and page mapping for residual data, allowing for efficient mapping of logical addresses to physical addresses based on the size and sequence of write data, thereby reducing the number of merge operations and enhancing write performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If block mapping is used to map logical addresses to physical addresses in flash memory devices, then the memory space management is simplified, but the number of merge operations increases and write performance deteriorates
Solution Approach 1:
The patent segments the write data into super sequential blocks (SSBs) and residual portions, applying different mapping strategies to each segment. SSBs are mapped using block mapping for simplified management, while residual portions are handled separately, reducing the frequency of merge operations and improving overall write performance.
2Productivity
If page mapping is used to map logical addresses to physical addresses, then write performance is improved, but the memory space utilization is reduced and device complexity increases
Solution Approach 1:
The patent applies different mapping qualities to different portions of write data based on their characteristics. Super sequential blocks, which have sequential access patterns, are mapped using block mapping with smaller table sizes. Residual portions with random access patterns are mapped using page mapping, optimizing for their specific access characteristics and reducing overall complexity.
3Quantity of substance
If frequent merge operations are performed to manage memory space in block mapping, then memory space availability is maintained, but the wear on memory cells increases and device lifespan decreases
Solution Approach 1:
The patent performs preliminary classification of write data into super sequential blocks and residual portions before mapping. By identifying SSBs in advance and applying block mapping specifically to them, the system maintains memory space availability through fewer merge operations, thereby reducing wear on memory cells and extending device lifespan.
Data Source
AI summary
Disclosed is an address mapping method for a data storage device using a hybrid mapping scheme. The address mapping method determines whether write data includes a defined super sequential block (SSB), and selects an address mapping mode for the write data in accordance with whether or not a SSB is present.