Hybrid Address Mapping for Memory Bank Collisions and Power Saving
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
On-chip memory systems face issues with concurrent access collisions, impaired performance due to data distribution patterns, and memory loss from defects, leading to increased latency, power consumption, and reduced capacity.
Innovation Solution
Implement hybrid logical to physical address mapping using interleave and fixed map modes, allowing a memory controller to optimize performance by distributing logical addresses across multiple banks, enabling efficient power management and defect isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If interleave mapping is used to distribute data across multiple banks, then memory access performance is improved, but power consumption increases because all banks must remain active
Solution Approach 1:
The patent implements dynamic map mode switching that allows the memory system to transition between interleave mapping and fixed mapping based on operational requirements. During high-performance needs, interleave mapping is used to activate multiple banks simultaneously. During low-activity periods, the system switches to fixed mapping to enable power-saving modes where fewer banks remain active, thus resolving the contradiction between performance and power consumption.
Solution Approach 2:
The system changes the mapping parameter dynamically by switching between interleave and fixed map modes. This parameter change allows the same memory hardware to operate in different configurations: interleave mode for high performance with all banks active, and fixed mode for power efficiency with selective bank activation, thereby resolving the performance-power tradeoff.
2Use of energy by moving object
If fixed mapping is used to reduce power consumption, then memory can enter power save mode, but access performance deteriorates due to bank collisions
Solution Approach 1:
The patent implements dynamic map mode switching that allows the memory system to transition between interleave mapping and fixed mapping based on operational requirements. During high-performance needs, interleave mapping is used to activate multiple banks simultaneously. During low-activity periods, the system switches to fixed mapping to enable power-saving modes where fewer banks remain active, thus resolving the contradiction between performance and power consumption.
Solution Approach 2:
The system changes the mapping parameter dynamically by switching between interleave and fixed map modes. This parameter change allows the same memory hardware to operate in different configurations: interleave mode for high performance with all banks active, and fixed mode for power efficiency with selective bank activation, thereby resolving the performance-power tradeoff.
3Speed
If interleave mapping is used across all memory banks, then access speed is improved, but defect propagation causes entire blocks to be lost
Solution Approach 1:
The patent segments the memory system into distinct interleave-mapped regions and fixed-mapped regions. The interleave-mapped portion handles performance-critical operations across multiple banks, while the fixed-mapped portion provides reliability through defect isolation. This segmentation allows the system to achieve both high speed and high reliability by assigning different mapping strategies to different functional requirements.
Solution Approach 2:
The patent applies different mapping qualities to different portions of the memory system. Interleave mapping with high-speed characteristics is applied to regions requiring performance, while fixed mapping with high-reliability characteristics is applied to regions where defect isolation is critical. This local differentiation of mapping quality resolves the contradiction between speed and reliability.
4Productivity
If hybrid mapping is implemented to balance performance and reliability, then system complexity increases
Solution Approach 1:
The patent implements a universal memory controller that can operate in multiple map modes (interleave and fixed) using the same hardware infrastructure. The controller dynamically selects the appropriate mapping mode based on operational requirements, eliminating the need for separate dedicated controllers for each mode. This multi-functionality reduces overall system complexity while maintaining the benefits of both mapping approaches.
Data Source
AI summary
The present disclosure describes apparatuses and methods for hybrid logical to physical (LTP) address mapping in memory systems. In various aspects, a memory controller maps, with an interleave map mode, a first portion of logical address space to a first portion of the physical address space of a memory. The memory controller also maps, with a fixed map mode, a second portion of logical address space to a second portion of the physical address space of the memory. Thus, the memory controller may configure some memory banks with interleave address mapping and other banks with fixed address mapping. In some cases, the memory controller may reconfigure a bank of the memory from one mapping mode to the other mapping mode. By so doing, the memory controller can leverage benefits provided by either mapping mode to optimize access performance, reduce power consumption, or isolate defective areas with minimal capacity loss.