Hybrid Audio Codec Switching With Low-Delay Aliasing Cancellation

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Solution Overview

Problem

Hybrid codecs face challenges in reducing algorithmic delay during real-time communication in applications like video conferencing and networked music performance, where frame size reduction increases the frequency of aliasing cancellation signals, necessitating efficient generation of these signals to maintain low-bit-rate and low-delay encoding.

Innovation Solution

A sound signal hybrid encoder and decoder that analyze signal characteristics to switch between lapped frequency domain and linear prediction encoding schemes, using specific AC signal generation methods to minimize aliasing and bit rate, with a focus on reducing frame size and overlap to achieve low algorithmic delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the frame size is reduced to decrease algorithmic delay, then the encoding delay is reduced, but the frequency of aliasing cancellation signals increases resulting in increased bit rate

Engineering Contradiction:
Improvealgorithmic delayVSAvoidbit rate
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

The patent changes the parameter of frame size to a specific small value (e.g., 256 samples) to reduce algorithmic delay, and simultaneously adjusts the aliasing cancellation signal generation parameters to maintain low bit rate despite increased signal frequency

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies partial action by generating aliasing cancellation signals only when codec switching occurs, rather than continuously, which reduces the overall bit rate contribution from AC signals while still maintaining low delay through small frame sizes

Inventive Principle:
Principle #16Partial or excessive action

2Loss of time

If the frame size is reduced to decrease algorithmic delay, then the encoding delay is reduced, but the frequency of frame switching increases resulting in increased frequency of AC signal occurrence

Engineering Contradiction:
Improvealgorithmic delayVSAvoidframe switching frequency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent changes the frame size parameter to a small fixed value to reduce delay, and compensates for the increased frame switching frequency by optimizing the AC signal generation to occur only at necessary switching points

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If the amount of coded data of AC signal is reduced to achieve low bit rate, then the bit rate decreases, but the aliasing cancellation effectiveness may be compromised

Engineering Contradiction:
Improvebit rateVSAvoidaliasing cancellation effectiveness
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent extracts only the essential aliasing cancellation components by generating AC signals selectively at codec switching points rather than continuously, removing unnecessary data while maintaining cancellation effectiveness

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by generating AC signals only when and where needed (at codec switching boundaries), rather than continuously throughout the entire signal, achieving low bit rate while maintaining reliability at critical points

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP2849180B1Hybrid audio signal encoder, hybrid audio signal decoder, method for encoding audio signal, and method for decoding audio signal
Publication Date: 2020.01.01 PANASONIC HOLDINGS CORP
  • EP2849180B1 patent drawingFigure 1
  • EP2849180B1 patent drawingFigure 2
  • EP2849180B1 patent drawingFigure 3

AI summary

A sound signal hybrid encoder (100) includes: a signal analysis unit (404) which determines a scheme for encoding a frame included in a sound signal; an LFD encoder (406, 410) which encodes a frame to generate an LFD frame; an LP encoder (408) which encodes a frame to generate an LP frame; a switching unit (405) which switches between the encoders according to a result of the determination by the signal analysis unit (404); and an AC signal generation unit (413) which generates an AC signal according to a scheme selected from among schemes, outputs the generated AC signal, and also outputs an AC flag indicating the selected scheme.