Hybrid Bond Sheet for Vertical Power Semiconductor Interconnects

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Solution Overview

Problem

Current chip embedding technologies face challenges in achieving high power density and efficiency due to long interconnect lengths, high parasitic inductance, and thermal decoupling between power semiconductors in next-generation power packages.

Innovation Solution

The implementation of a semiconductor power entity using vertical system integration, panel level packaging, and low-temperature metal joining techniques, such as diffusion soldering or sintering, to create direct vertical connections between laminate core layers, reducing interconnect length and enhancing thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If micro-via interconnects are used for connections between vertically arranged power semiconductors, then connections can be made outside the die area, but the routing distance becomes long and commutation loop inductance increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidrouting distance
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent transitions from lateral micro-via interconnects to vertical through-silicon via (TSV) interconnects, changing the connection dimension from horizontal to vertical. This allows direct penetration through the substrate, dramatically shortening the current path and reducing loop inductance while maintaining connection reliability between vertically stacked power semiconductors

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If through-via is placed at minimum distance from embedded component edge, then via process tolerances are accommodated, but routing distance increases and commutation loop inductance becomes high

Engineering Contradiction:
Improvevia placement toleranceVSAvoidcommutation loop inductance
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the connection function from the peripheral micro-via approach and relocates it to the central region through TSV technology. This allows the through-via to be positioned optimally for minimizing loop area while still accommodating manufacturing tolerances, effectively separating the connection function from the substrate edge constraints

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If laminate layer with low thermal conductivity is used between two dies, then electrical isolation is achieved, but thermal decoupling occurs and dies reach different operating temperatures

Engineering Contradiction:
Improveelectrical isolationVSAvoidthermal decoupling
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent employs a composite substrate structure combining electrically insulating materials with high thermal conductivity fillers (such as aluminum nitride or boron nitride particles). This composite material simultaneously provides electrical isolation between stacked dies while maintaining thermal coupling through the substrate, preventing thermal decoupling and ensuring uniform operating temperatures

Inventive Principle:
Principle #40Composite materials

4Productivity

If vertical system integration is implemented, then interconnect length is shortened and power density increases, but manufacturing complexity increases

Engineering Contradiction:
Improvepower densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary formation of through-silicon via holes and metallization layers during the substrate fabrication stage, before die stacking. This preliminary action allows the complex TSV structure to be pre-established in the substrate, simplifying the subsequent die attachment process and reducing overall manufacturing complexity while maintaining the high power density benefits of vertical integration

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly increases power density and efficiency, reduces parasitic interconnection paths, and improves thermal and electrical isolation, enabling conductor traces with high current capability and power modules with low stray inductance.

Implementation Method 1

the one or more metallic through-connections and the first and second metal bond layers of the hybrid bond sheet form an electrically and thermally conductive connection with the second metal layer and the third metal layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the one or more metallic through-connections and the first and second metal bond layers of the hybrid bond sheet form an electrically and thermally conductive connection

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250046682A1Semiconductor power entity, method for producing such entity by hybrid bonding and hybrid bond sheet
Publication Date: 2025.02.06 HUAWEI DIGITAL POWER TECH CO LTD
  • US20250046682A1 patent drawing
  • US20250046682A1 patent drawing
  • US20250046682A1 patent drawing

AI summary

A hybrid bond sheet for bonding a first joining member to a second joining member, including: a core layer including: a core insulating layer formed between an upper main face and a lower main face of the core layer; and one or more metallic through-connections penetrating the core insulating layer from the upper main face to the lower main face. The hybrid bond sheet includes a first bonding layer with a first insulating bond layer and a first metal bond layer for bonding the first joining member. The hybrid bond sheet includes a second bonding layer with a second insulating bond layer and a second metal bond layer for bonding the second joining member. The one or more metallic through-connections and the first and second metal bond layers are configured to form an electrically and thermally conductive connection with the first joining member and the second joining member.