Hybrid-Bonded Chip Structure With Fine Grain and Nanotwin Copper

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Solution Overview

Problem

Existing semiconductor chip structures face challenges in achieving high bonding reliability when bonding a first semiconductor chip to a second semiconductor chip, which can result in poor performance of the chip structures.

Innovation Solution

A semiconductor chip structure is designed with a first semiconductor chip bonded to a second semiconductor chip using a hybrid-bonding technique. The bonding interface includes fine grain copper and nanotwin copper, with the fine grain copper on the surface and nanotwin copper filling the inner portions and surrounding the side surfaces of the bonding electrodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bonding methods are used to bond semiconductor chips, then the manufacturing process is simple, but the bonding reliability is insufficient

Engineering Contradiction:
Improvebonding reliabilityVSAvoidbonding structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bonding electrode uses a composite structure combining fine grain copper (grain size 1 μm or less) and nanotwin copper, creating a multi-phase material system that leverages the high ductility of fine grain copper and the high strength of nanotwin copper to achieve superior bonding reliability

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The bonding electrode exhibits non-uniform microstructure with different regions having different properties: fine grain copper is distributed in specific areas to provide ductility and bonding capability, while nanotwin copper forms in other regions to provide strength, creating local quality variations that optimize both bonding reliability and mechanical properties

Inventive Principle:
Principle #3Local quality

2Reliability

If hybrid bonding technique with fine grain copper and nanotwin copper is used, then bonding reliability is enhanced, but the manufacturing complexity increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The manufacturing process controls copper grain structure by changing physical parameters during fabrication, specifically controlling grain size to 1 μm or less and creating nanotwin structures through controlled processing conditions, thereby achieving the desired microstructure through parameter optimization rather than complex additional steps

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of fine grain copper and nanotwin copper in the bonding interface enhances the bonding reliability between the first and second semiconductor chips, improving the overall performance and stability of the chip structure.

Implementation Method 1

The first bonding insulation layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid-bonded to the second bonding insulation layer and the second bonding electrode of the second bonding wiring layer

Methodology Applied
Scientific EffectHybrid bonding:

Data Source

PatentEP4503106A1Semiconductor chip structure
Publication Date: 2025.02.05 SAMSUNG ELECTRONICS CO LTD
  • EP4503106A1 patent drawingFigure 1
  • EP4503106A1 patent drawingFigure 2
  • EP4503106A1 patent drawingFigure 3A

AI summary

A semiconductor chip structure includes a plurality of semiconductor chips. A bonding electrode included in each of the semiconductor chips is filled with nanotwin copper and fine grain copper is disposed in at least a portion of the bonding electrode.