Semiconductor package for increasing bonding reliability
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Solution Overview
Problem
Existing semiconductor packages face challenges in achieving high bonding reliability between semiconductor chips, which can lead to functional issues if not adequately addressed.
Innovation Solution
The semiconductor package incorporates a hybrid-bonding approach, where multiple sub-main pads on each chip are bonded together, supported by insulation layers and structural elements like support pads and vias, to enhance bonding reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple sub-main pads are used for hybrid bonding, then bonding reliability is improved, but device complexity increases
Solution Approach 1:
Each main pad is divided into multiple sub-main pads, transforming a single large bonding interface into multiple smaller bonding units. This segmentation improves bonding reliability by distributing stress across multiple contact points while reducing dishing depth at each individual pad location. The support pad and support via structures further segment the mechanical load path, preventing stress concentration.
Solution Approach 2:
The patent introduces support pads and support vias at specific locations beneath the sub-main pads to provide localized mechanical reinforcement. This local quality enhancement addresses stress concentration issues at critical bonding points without requiring complex structures throughout the entire device, thereby improving reliability while controlling overall complexity.
2Stress or pressure
If sub-main pads are spaced apart, then bonding stress is reduced, but bonding area decreases
Solution Approach 1:
The bonding area is segmented into multiple sub-main pads spaced apart from each other. This segmentation reduces the stress concentration that would occur in a single large pad while maintaining the total bonding area through the cumulative effect of multiple smaller pads. The spacing between sub-pads allows for stress distribution and reduces dishing depth.
Solution Approach 2:
The patent extends the bonding structure into the vertical dimension by introducing support pads and support vias beneath the sub-main pads. This dimensional extension provides mechanical reinforcement without increasing the lateral spacing between pads, thereby maintaining bonding area while reducing stress through the additional structural support in the vertical dimension.
Data Source
AI summary
A semiconductor package includes a first semiconductor chip and a second semiconductor chip hybrid-bonded to the first semiconductor chip. The first semiconductor chip includes first main pads, which are apart from each other, and a first bonding insulation layer extending around the first main pads. Each of the first main pads includes first sub main pads apart from each other. The second semiconductor chip includes second main pads, which are spaced apart from each other, and a second bonding insulation layer extending around the second main pads. The second main pads are aligned with the first main pads. Each of the second main pads includes second sub main pads spaced apart from each other. Each of the second sub main pads is bonded to a respective one of the first sub main pads. The second bonding insulation layer is bonded to the first bonding insulation layer.