Hybrid Bonded Semiconductor Substrates with Embedded Capacitors
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in efficiently integrating multiple layers and components at the wafer level, leading to complexities in manufacturing and increased costs due to the need for precise alignment and bonding of various substrates and components.
Innovation Solution
The method involves hybrid bonding of semiconductor substrates with embedded capacitors and through-silicon vias (TSVs) using a hybrid bonding process, followed by planarization and redistribution circuit formation, allowing for the integration of multiple layers and components in a package structure, and enabling the formation of a package-on-package (PoP) structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple layers and components are integrated at the wafer level, then device functionality and integration density are improved, but manufacturing complexity and alignment precision requirements increase
Solution Approach 1:
The manufacturing process is divided into distinct stages: forming recesses in first substrates, bonding second substrates to these recesses, and subsequently forming through-silicon vias and filling conductive materials. This segmentation allows each step to be optimized independently, reducing overall manufacturing complexity while maintaining high integration density
Solution Approach 2:
The method performs preliminary actions by pre-forming recesses in the first substrates and pre-bonding second substrates before completing the through-silicon via formation and conductive filling. This preliminary structuring simplifies subsequent processing steps and reduces alignment complexity during final assembly
2Reliability
If precise alignment and bonding of various substrates and components are performed, then bonding reliability is improved, but manufacturing time and process complexity increase
Solution Approach 1:
The method merges the bonding process with the via formation process by performing through-silicon via formation directly on bonded substrates. This combination eliminates separate alignment and bonding steps, reducing total manufacturing time while maintaining bonding reliability through the integrated process approach
Solution Approach 2:
Substrates are pre-bonded in a preliminary step with relaxed alignment requirements, and subsequent through-silicon via formation and conductive filling are performed on the already-bonded structure. This preliminary bonding approach reduces overall process time while ensuring reliable electrical connections
3Reliability
If through-silicon vias and embedded capacitors are formed, then electrical connectivity and power integrity are improved, but manufacturing process complexity increases
Solution Approach 1:
The method merges capacitor formation with the through-silicon via formation process by forming capacitors within the same recesses and using the same conductive filling steps. This integration reduces process complexity while achieving both electrical connectivity through vias and power integrity through embedded capacitors
Solution Approach 2:
The recesses formed in the substrates serve multiple functions: they house the embedded capacitors for power integrity, provide pathways for through-silicon vias for electrical connectivity, and enable mechanical interlocking for bonding. This multi-functionality reduces the number of separate process steps required
4Manufacturing precision
If planarization and redistribution circuit formation are performed, then coplanarity and flatness are improved, but manufacturing steps and time increase
Solution Approach 1:
The method merges planarization with redistribution circuit formation by performing both operations in an integrated sequence after bonding. This combination achieves the necessary coplanarity for subsequent packaging steps while reducing the total number of discrete manufacturing steps and improving overall productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration of active and passive components, improves power integrity, and simplifies the manufacturing process by ensuring high coplanarity and flatness, thereby reducing costs and increasing yield.
Implementation Method 1
performing a first fusion bonding step to bonding the first semiconductor substrate and the second semiconductor substrate for electrically connection thereof
Data Source
AI summary
A semiconductor structure including at least one integrated circuit component is provided. The at least one integrated circuit component includes a first semiconductor substrate and a second semiconductor substrate electrically coupled to the first semiconductor substrate, wherein the first semiconductor substrate and the second semiconductor substrate are bonded through a first hybrid bonding interface, and at least one of the first semiconductor substrate or the second semiconductor substrate includes at least one first embedded capacitor.