Semiconductor Hybrid Bonding With Boron Polishing-Stop Layer

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Solution Overview

Problem

Existing wafer bonding processes in semiconductor manufacturing are plagued by structural damage and high costs due to the use of toxic tetramethylammonium hydroxide, and lack efficient methods to control polishing processes.

Innovation Solution

A method involving boron doping to create a polishing-stop layer in the substrate, enabling precise control of polishing processes and eliminating the need for tetramethylammonium hydroxide, while utilizing hybrid bonding technology for enhanced integration and reduced pad sizes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If tetramethylammonium hydroxide is used in the wafer bonding process, then bonding can be achieved, but structural damages occur and treatment costs increase

Engineering Contradiction:
Improvebonding qualityVSAvoidstructural damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes tetramethylammonium hydroxide from the bonding process entirely, replacing it with a direct wafer-to-wafer bonding method that uses bonding pads and bonding curves to achieve reliable bonding without the harmful chemical

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces bonding pads with bonding curves as intermediaries between the wafers. These bonding curves act as mediators that facilitate reliable bonding while eliminating the need for tetramethylammonium hydroxide, thus preventing structural damage

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If tetramethylammonium hydroxide is used in the wafer bonding process, then bonding can be achieved, but treatment costs increase

Engineering Contradiction:
Improvebonding qualityVSAvoidtreatment cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts tetramethylammonium hydroxide from the manufacturing process, eliminating the need for expensive chemical treatment and disposal operations while maintaining bonding quality through direct wafer bonding

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses consumable bonding pads and bonding curves that are inexpensive compared to the cost of tetramethylammonium hydroxide treatment, achieving reliable bonding at lower overall manufacturing cost

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If conventional wafer bonding process is used, then bonding can be achieved, but polishing control precision is insufficient

Engineering Contradiction:
Improvebonding qualityVSAvoidpolishing control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary polishing of the wafers before bonding to ensure precise surface flatness and alignment. This preliminary action enables accurate positioning and reduces the need for post-bonding adjustments

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces chemical-based bonding and polishing methods with a mechanical approach using bonding pads and bonding curves that provide precise physical contact and alignment, enabling better polishing control

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Productivity

If hybrid bonding is used, then integration density and data communication speeds are enhanced, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the bonding interface into distinct bonding pads with bonding curves, segmenting the complex hybrid bonding process into manageable discrete elements that can be manufactured and controlled more easily

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent optimizes parameters such as bonding pad size, bonding curve geometry, and material composition to achieve high integration density and data communication speeds while keeping the manufacturing process manageable

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes structural damage, reduces costs, and enhances integration density and data communication speeds by using boron-doped regions as polishing-stop layers and hybrid bonding, eliminating the need for toxic chemicals.

Implementation Method 1

introducing boron into a first substrate to form an doped region in the first substrate

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

hybrid bonding the first semiconductor structure and the second semiconductor structure

Methodology Applied
Scientific EffectBonding: Chemical Bonding

Data Source

PatentUS20260060154A1Method for manufacturing semiconductor bonding structure
Publication Date: 2026.02.26 UNITED MICROELECTRONICS CORP
  • US20260060154A1 patent drawing
  • US20260060154A1 patent drawing
  • US20260060154A1 patent drawing

AI summary

A method for manufacturing a semiconductor bonding structure is provided. The method includes forming a first semiconductor structure, forming a second semiconductor structure and hybrid bonding the first semiconductor structure and the second semiconductor structure. The step of forming the first semiconductor structure includes introducing boron into a first substrate to form an doped region in the first substrate, forming a first dielectric layer above the first substrate, and forming a first conductive pad in the first dielectric layer. The step of forming a second semiconductor structure includes forming a second dielectric layer above a second substrate, and forming a second conductive pad in the second dielectric layer. The first conductive pad is attached to the second conductive pad. The first dielectric layer is attached to the second dielectric layer.