Hybrid Bonding CMP for Mixed-Pitch Substrates Without Copper Dishing
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Solution Overview
Problem
Conventional hybrid bonding techniques for microelectronic components suffer from oxide rounding and conductive structure dishing, leading to gaps and failed copper bonding due to uneven material wear during chemical-mechanical planarization, affecting the quality and reliability of the bond surface.
Innovation Solution
A method involving chemical mechanical polishing (CMP) is employed to form a planar bonding surface by depositing and patterning a dielectric layer, forming openings, and then polishing the conductive structure and barrier layer to control recess and dielectric erosion, ensuring a smooth interface for hybrid bonding without adhesive.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If chemical-mechanical planarization (CMP) is used to prepare bonding surfaces, then the surfaces can be planarized for hybrid bonding, but oxide rounding and conductive structure dishing occur due to uneven material wear
Solution Approach 1:
The patent modifies CMP process parameters including using softer polishing pads, reducing polishing pressure, and adjusting slurry composition to minimize material removal rates and prevent oxide rounding and conductive structure dishing while maintaining planarity
Solution Approach 2:
The patent performs preliminary planarization steps before hybrid bonding to pre-condition the bonding surfaces, removing high points and preparing the surfaces for intimate contact during bonding, thereby preventing defects that would compromise bonding quality
2Manufacturing precision
If conventional CMP processes are applied to remove excess materials, then the bonding surface can be planarized, but gaps form in the oxide bonding between copper elements due to oxide rounding
Solution Approach 1:
The patent changes CMP parameters to use softer polishing pads and reduced pressure, which minimizes the removal rate and prevents oxide rounding at the bonding interface, ensuring intimate contact and reliable oxide bonding between substrates
3Manufacturing precision
If aggressive CMP is used to achieve planarity, then the bonding surface becomes flat, but conductive structure dishing causes failed copper bonding
Solution Approach 1:
The patent employs softer polishing pads and reduced polishing pressure to minimize material removal, preventing conductive structure dishing while achieving sufficient planarity for successful copper bonding between substrates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the planarity of the bonding surface, reducing dielectric erosion and conductive structure dishing, thereby enhancing the yield and reliability of hybrid bonding processes.
Implementation Method 1
chemical mechanical polishing (CMP) is employed to form a planar bonding surface by depositing and patterning a dielectric layer, forming openings, and then polishing the conductive structure and barrier layer
Data Source
AI summary
Representative implementations of techniques and methods include chemical mechanical polishing for hybrid bonding. The disclosed methods include depositing and patterning a dielectric layer on a substrate to form openings in the dielectric layer, depositing a barrier layer over the dielectric layer and within a first portion of the openings, and depositing a conductive structure over the barrier layer and within a second portion of the openings not occupied by the barrier layer, at least a portion of the conductive structure in the second portion of the openings coupled or contacting electrical circuitry within the substrate. Additionally, the conductive structure is polished to reveal portions of the barrier layer deposited over the dielectric layer and not in the second portion of the openings. Further, the barrier layer is polished with a selective polish to reveal a bonding surface on or at the dielectric layer.