Hybrid Bonding Structures With Thermal Expansion Compensation Cavities
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Solution Overview
Problem
During hybrid bonding processes in IC packaging, the mismatch in thermal expansion coefficients between copper and dielectric materials like polyimide (PI) leads to non-planarity and voiding issues, resulting in incomplete copper-to-copper connections due to PI flowing between interconnect structures.
Innovation Solution
Incorporation of self-correcting protrusion architectures with openings adjacent to conductive interconnect structures allows dielectric material to flow in the z-direction during bonding, preventing void formation by accommodating thermal expansion differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If copper protrusion is used to accommodate CTE mismatch between copper and PI, then non-planarity is reduced, but PI protrusion still occurs relative to the copper interconnect structure causing voiding
Solution Approach 1:
The patent applies preliminary action by pre-forming recessed copper interconnect structures before the hybrid bonding process. This preliminary recess configuration is designed to anticipate and compensate for the thermal expansion that will occur during bonding, allowing the PI to expand into the recessed areas without creating voids or protrusions that would compromise bonding reliability.
Solution Approach 2:
The patent changes the geometric parameters of the copper interconnect structures by creating recessed configurations with specific depth and width dimensions. These parameter changes are calculated to match the expected thermal expansion of the PI material, transforming the copper structures from protruding or flush configurations to recessed ones that accommodate CTE mismatch during bonding.
2Temperature
If PI is used to facilitate copper to copper bonding at lower temperatures, then processing temperature is reduced and TTV requirements are relaxed, but PI flows between copper interconnect structures causing voiding
Solution Approach 1:
The patent applies local quality by creating non-uniform copper interconnect structures with recessed regions at specific locations where PI flow is expected. Rather than uniformly adjusting all copper structures, the recessed configurations are strategically placed and dimensioned to locally accommodate PI thermal expansion in critical bonding areas, preventing void formation while maintaining the low-temperature bonding advantage.
Solution Approach 2:
The patent converts the harmful effect of PI flow between copper interconnect structures into a beneficial outcome by designing recessed copper structures that guide and accommodate this flow. The PI's thermal expansion, which would normally cause voiding and bonding failure, is redirected into the pre-formed recessed areas, ensuring complete copper-to-copper contact and successful bonding.
3Reliability
If recessed copper interconnect structures are used, then PI protrusion is accommodated, but the process window for copper recess package structures is limited
Solution Approach 1:
The patent applies segmentation by dividing the copper interconnect structures into multiple regions with different geometries - some areas have recessed configurations while others maintain standard profiles. This segmentation allows different portions of the bonding interface to be optimized for different functions, expanding the overall process window by accommodating variations in copper recess depth and PI expansion characteristics across the bonding area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and performance of hybrid bonding by eliminating voids in conductive interconnects and widening the process window for copper recess package structures.
Implementation Method 1
the mismatch in thermal expansion coefficients between copper and dielectric materials like polyimide (PI) leads to non-planarity and voiding issues
Data Source
AI summary
Microelectronic integrated circuit package structures include a first substrate coupled to a second substrate by a conductive interconnect structure and a dielectric material adjacent to the conductive interconnect structure. A cavity in a surface of the first substrate is adjacent to the conductive interconnect structure. A portion of the dielectric material is within the cavity.