Hybrid Bonding Metallization with Nanotwin and Bulk Copper

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Solution Overview

Problem

Current semiconductor technologies face challenges in synthesizing high-efficiency nanotwin copper (NTCu) for copper redistribution lines (RDL) and hybrid bonding due to sidewall seeding disruptions, especially in high aspect ratio features, and fine grain copper stability issues, which affect thermal expansion and electronic properties.

Innovation Solution

A copper stack structure comprising a first layer of nanotwin copper and a second layer of bulk copper, where the bulk copper is deposited before or after the nanotwin copper, and includes an intermediate cleaning step, to create a hybrid bonding interface with controlled grain structure suitable for low temperature hybrid bonding applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If nanotwin copper is used for hybrid bonding interface, then bonding strength and thermal stability are improved, but sidewall seeding disruptions occur especially in high aspect ratio features

Engineering Contradiction:
Improvebonding strengthVSAvoidgrain structure integrity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The copper structure is divided into two distinct layers: a nanotwin copper layer at the bonding interface for high strength and thermal stability, and a bulk copper layer filling the high aspect ratio via for structural support and reduced sidewall seeding disruption. This segmentation allows each layer to optimize its function independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different grain structures are applied to different locations within the copper fill: nanotwin copper with its distinctive mechanical properties is localized at the bonding interface where strength is critical, while bulk copper is used in the via body where structural support and filling capability are prioritized.

Inventive Principle:
Principle #3Local quality

2Temperature

If fine grain copper is used to reduce thermal expansion energy, then thermal stability is improved, but grain growth occurs during queue time requiring additional time and expense

Engineering Contradiction:
Improvethermal stabilityVSAvoidqueue time
Core Design Contradiction:
TemperatureVSDuration of action of stationary object

Solution Approach 1:

The nanotwin copper layer is formed with its stable grain structure before bonding, creating a pre-stabilized interface that maintains its structural integrity throughout the queue time and subsequent processing steps, eliminating the need for post-plating grain stabilization measures.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conventional copper plating is used for filling, then filling capability is good, but cracks occur due to high temperature annealing and CTE mismatch

Engineering Contradiction:
Improvefilling capabilityVSAvoidcrack resistance
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The copper interconnect structure combines two copper forms with complementary properties: nanotwin copper providing high strength and crack resistance at the bonding interface, and bulk copper providing excellent filling capability in the via body. This composite structure resolves the contradiction between ease of manufacture and strength.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the percentage of nanotwin copper on the hybrid bonding interface, reduces sidewall interruptions, and maintains grain stability, improving filling capabilities in small damascene features and reducing thermal expansion energy requirements.

Implementation Method 1

a copper electroplating inside the at least one via, where the copper electroplating includes a first layer of nanotwin copper, and a second layer of bulk copper

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS20240254645A1Low temperature hybrid bonding metallization
Publication Date: 2024.08.01 APPLIED MATERIALS INC
  • US20240254645A1 patent drawing
  • US20240254645A1 patent drawing
  • US20240254645A1 patent drawing

AI summary

A semiconductor wafer, including a substrate, at least one via formed in the substrate, and copper electroplating inside the at least one via, where the copper electroplating comprises a first layer of nanotwin copper, and a second layer of bulk copper. Further, a method of making a semiconductor wafer, the method comprising providing a substrate; etching the substrate to form at least one via; and depositing copper electroplating inside the at least one via, wherein the copper electroplating comprises a first layer of nanotwin copper, and a second layer of bulk copper.