Hybrid Bonding Test Pad Layout for Micro-Disconnection Detection

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Solution Overview

Problem

The challenge in semiconductor devices is detecting micro-disconnections between upper and lower chips during hybrid bonding, as these disconnections can vary with temperature and are difficult to identify, affecting the electrical characteristics and production yields.

Innovation Solution

Incorporating a test pad with a larger width than the normal pad, located at the chip edge or corner, which forms concave surfaces and can detect micro-disconnections without additional testing steps, facilitating improved reliability and uniformity by allowing for the detection and remediation of such disconnections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a normal pad is used for hybrid bonding, then the bonding process is simple, but micro-disconnections cannot be detected

Engineering Contradiction:

Improvedetection capabilityVSAvoidpad structure

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The pad structure is segmented into two distinct types: normal pads for standard bonding operations and test pads for detection purposes. This segmentation allows the system to maintain simple bonding processes while incorporating detection capabilities through the separate test pad functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The test pad acts as an intermediary element that enables indirect detection of micro-disconnections. By providing a dedicated test structure with larger width and different geometric characteristics, the system can detect bonding quality issues without interfering with the normal bonding process.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Measurement precision

If the test pad width is increased to enhance detection capability, then micro-disconnections can be detected, but the pad size becomes larger than normal pads

Engineering Contradiction:

Improvemicro-disconnection detectionVSAvoidpad area

Core Design Contradiction:

Measurement precisionVSArea of moving object

Solution Approach 1:

Different pad regions are assigned different qualities and dimensions: normal pads maintain their standard size for常规 bonding, while test pads are locally enlarged to provide enhanced detection capability. This local quality differentiation allows the test pad to serve its detection function without requiring all pads in the device to be larger.

Inventive Principle:

Principle #3Local quality

3Productivity

If integration density is increased to meet high-speed and low-power demands, then device performance improves, but electrical characteristics and production yields decrease

Engineering Contradiction:

Improvedevice performanceVSAvoidelectrical characteristics

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The test pads are incorporated into the device structure in advance, before bonding operations occur. This preliminary action enables detection capabilities to be built into the device architecture itself, allowing for post-bonding verification of bonding quality without requiring additional external testing equipment or processes.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of a test pad enhances the detection of micro-disconnections, improving the electrical characteristics and reliability of semiconductor devices by allowing for the identification and potential adjustment of bonding processes, thereby increasing the bonding quality and production yields.

Implementation Method 1

The test pad can be larger than the normal pad to enhance dishing, e.g., the surfaces of the upper and lower chips that face each other forming concave surfaces

Methodology Applied

Scientific EffectDishing:

Implementation Method 2

at a relatively low test temperature, the lower and upper chips can have be disconnected along the entire interface of the lower and upper chips due to the lower and upper chips thermally contracting

Methodology Applied

Scientific EffectThermal contraction: Thermal Contraction

Implementation Method 3

at a relatively high test temperature, only segments of disconnection can occur along the interface of the lower and upper chips facing each other due to the lower and upper chips thermally expanding

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS20240030074A1Semiconductor device and method of manufacturing the same

Publication Date: 2024.01.25 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device includes a base structure comprising a first bonding pad and a first test pad, and a semiconductor chip comprising a second bonding pad being in contact with the first bonding pad of the base structure and a second test pad being in contact with the first test pad of the base structure. A width of the second bonding pad of the semiconductor chip is less than a width of the second test pad of the semiconductor chip. An air gap is provided between the first test pad of the base structure and the second test pad of the semiconductor chip.