Hybrid Cache Management for Multiprocessor Systems
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Solution Overview
Problem
In computing systems, the exclusive cache method leads to decreased L2 cache hit probability due to larger size and access delays, while the inclusive method results in duplicated cache resource usage, affecting overall system performance.
Innovation Solution
A hybrid cache method that combines inclusive and exclusive methods, where the first cache searches for data, and upon a miss, the second cache is searched, with cache lines being set as clean upon hit, reducing flushing frequency and optimizing cache memory performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the inclusive method is adopted for cache memory, then the cache hit rate is improved, but the resource duplication increases and efficiency is lowered
Solution Approach 1:
The patent implements a dynamic cache management system that can switch between inclusive and exclusive methods based on workload characteristics. The system monitors cache performance metrics and dynamically adjusts the cache coherence protocol, allowing it to adapt to different access patterns and optimize the balance between hit rate and resource utilization in real-time.
Solution Approach 2:
The system changes the operational parameters of the cache by adjusting the inclusiveness level based on workload types. For compute-bound workloads, it adopts a more inclusive approach to maximize hit rates, while for memory-bound workloads, it shifts toward exclusive methods to reduce duplication. This parameter adjustment resolves the contradiction by making the cache behavior flexible rather than static.
2Quantity of substance
If the exclusive method is adopted for cache memory, then the resource duplication is reduced, but the L2 cache hit probability decreases due to larger size and access delays
Solution Approach 1:
The patent implements a dynamic cache management system that can switch between inclusive and exclusive methods based on workload characteristics. The system monitors cache performance metrics and dynamically adjusts the cache coherence protocol, allowing it to adapt to different access patterns and optimize the balance between hit rate and resource utilization in real-time.
Solution Approach 2:
The system changes the operational parameters of the cache by adjusting the inclusiveness level based on workload types. For compute-bound workloads, it adopts a more inclusive approach to maximize hit rates, while for memory-bound workloads, it shifts toward exclusive methods to reduce duplication. This parameter adjustment resolves the contradiction by making the cache behavior flexible rather than static.
3Reliability
If flushing is increased to maintain cache coherence, then the data consistency is improved, but the system performance is lowered
Solution Approach 1:
The patent implements a feedback-based flushing mechanism that monitors cache state and workload characteristics to determine when flushing is necessary. Instead of aggressive periodic flushing, the system uses feedback from cache miss rates and coherence events to trigger flushing only when needed, significantly reducing the performance overhead while maintaining data consistency.
Solution Approach 2:
The system takes preliminary actions to prevent coherence conflicts before they occur by using prediction mechanisms. It anticipates potential coherence issues based on access patterns and proactively manages cache state, reducing the need for frequent flushing operations and thereby maintaining higher system performance while ensuring data consistency.
Data Source
AI summary
A multiprocessor system includes a plurality of processors, a first cache device corresponding to a first processor of the plurality of processors and including a first cache memory configured to store a plurality of first cache lines, and a second cache device at different level than the first cache device, corresponding to the plurality of processors, and including a second cache memory that stores a plurality of second cache lines, in which the first cache device is configured to, in response to a request related to data access, search the first cache memory for data, and the second cache device is configured to, in response to the data cache-missed in the first cache memory, search the second cache memory for data, and in response to the data cache-hit in the second cache memory, set cache line of the second cache memory corresponding to the data as clean cache line.