Hybrid Check Node Processing for Low-Latency NB-LDPC EMS Decoding
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Solution Overview
Problem
Current decoding algorithms for non-binary LDPC codes, such as the EMS algorithm, require significant computational and storage resources, leading to high complexity and latency, especially in check node processing units, which limits their application in real-time and high-throughput systems.
Innovation Solution
The proposed solution involves a hybrid architecture for check node processing units that combines syndrome-based and forward-backward architectures, along with presorting techniques to dynamically adjust the order of variable node messages, reducing computational complexity and latency while maintaining high throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the EMS algorithm is used for decoding non-binary LDPC codes, then decoding performance is improved, but computational complexity and storage resources increase significantly
Solution Approach 1:
The check node processing is divided into multiple blocks, where each block processes a subset of variable node messages. This segmentation reduces the computational burden on each processing unit while maintaining the overall decoding performance of the EMS algorithm.
Solution Approach 2:
The patent employs dynamic presorting of variable node messages based on their reliability metrics before processing. This dynamic reordering optimizes the computation sequence, reducing the number of operations required while preserving the accuracy of the EMS decoding algorithm.
2Reliability
If the EMS algorithm is used for decoding non-binary LDPC codes, then decoding performance is improved, but latency increases
Solution Approach 1:
By dividing check node processing into parallel blocks, the patent enables simultaneous processing of multiple message subsets, thereby reducing the total time required for decoding while maintaining EMS algorithm performance.
Solution Approach 2:
Variable node messages are presorted by reliability metrics before being processed by check node blocks. This preliminary action optimizes the processing sequence, reducing the number of computational steps needed and thereby decreasing latency.
3Productivity
If check node processing is performed with high throughput requirements, then productivity is improved, but device complexity increases
Solution Approach 1:
The patent divides the check node processing unit into multiple parallel blocks, each handling a portion of the total message flow. This segmentation enables high throughput through parallel processing while keeping each individual processing block relatively simple.
Solution Approach 2:
Each check node block is designed with a universal structure that can process different subsets of variable node messages. This multi-functionality allows the same hardware template to be reused across multiple blocks, reducing overall device complexity while maintaining high throughput capability.
Data Source
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AI summary
Embodiments of the invention provide a check node processing unit (25-cn) configured to determine at least two check node messages in an Extended Min-Sum, EMS, decoder to decode a signal encoded using a NB-LDPC code, the check node processing unit comprising: - a data link to one or more message presorting units (24-cn) configured to determine at least three permuted variable node messages by permuting at least three variable node messages generated by one or more variable node processing units (23), each variable node message comprising components, a component comprising a symbol and a reliability metrics associated with said symbol; - a syndrome sub-check node (31) configured to determine check node messages from a set of syndromes, the set of syndromes being determined from one or more intermediate messages computed from the at least three permuted variable node messages; - a forward-backward sub-check node (32) configured to determine permuted check node messages at least from one of said one or more intermediate messages. - a switching unit (33) configured to generate each check node message of a given index from the check node messages determined by the at least one syndrome sub-check node (31) or from the permuted check node messages determined at the at least a forward-backward sub-check node (32) depending on said given index.