Hybrid-Bonded Semiconductor Chip Structure Without Scribe Lane Steps
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Solution Overview
Problem
Conventional semiconductor chip structures face issues with bonding reliability due to step differences between chip and scribe lane regions, affecting the proper bonding and functionality of semiconductor chips.
Innovation Solution
A semiconductor chip structure is designed with hybrid bonding between first and second semiconductor chips, featuring flat bonding surfaces and layers such as bonding insulating layers and electrodes, ensuring reliable bonding through flat surfaces and hybrid bonding techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor chips are used with step differences between chip region and scribe lane region, then manufacturing process is simpler, but bonding reliability deteriorates
Solution Approach 1:
The chip surface is divided into two distinct regions: a chip region with a first surface and a scribe lane region with a second surface. By segmenting the bonding structure, each region can be independently optimized - the chip region maintains its original wiring patterns while the scribe lane region is specifically designed for bonding, eliminating step differences without complicating the overall chip manufacturing process
Solution Approach 2:
The patent introduces a vertical dimension solution by forming a bonding pad structure that extends from the first surface through the substrate to the second surface. This dimensional approach allows the bonding interface to be established at the second surface level, effectively eliminating step differences between regions while maintaining the original chip region geometry
2Manufacturing precision
If step differences exist between chip region and scribe lane region, then manufacturing process is easier, but bonding precision deteriorates
Solution Approach 1:
The bonding pad structure is formed in advance during the chip manufacturing process, extending through the substrate before bonding occurs. This preliminary formation of the bonding interface structure ensures that when bonding takes place, both the chip region and scribe lane region are at the same surface level, eliminating step differences and enabling precise bonding without requiring additional post-manufacturing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure enhances bonding reliability by eliminating step differences and facilitating robust connections between chip regions and scribe lane regions, improving the overall performance and functionality of the semiconductor chips.
Implementation Method 1
the first bonding insulating layer and the first bonding electrode in the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode in the second bonding wiring layer
Data Source
AI summary
A semiconductor chip structure includes a first semiconductor chip that includes a first chip region and a first scribe lane region and a second semiconductor chip that includes a second chip region and a second scribe lane region respectively bonded to the first chip region and the first scribe lane region. The first semiconductor chip includes a first bonding wiring layer that includes a first bonding insulating layer and a first bonding electrode in the first bonding insulating layer. The second semiconductor chip includes a second bonding wiring layer that includes a second bonding insulating layer and a second bonding electrode in the second bonding insulating layer and a polishing stop pattern. The first bonding insulating layer and the first bonding electrode of the first bonding wiring layer are respectively hybrid bonded to the second bonding insulating layer and the second bonding electrode of the second bonding wiring layer.