Hybrid-Bonded Semiconductor Package for Stacked Chip Heat Transfer
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving improved thermal properties and increased yield, particularly in vertically stacked configurations where existing bonding methods do not effectively manage the thermal interface and mechanical stability of stacked semiconductor chips.
Innovation Solution
A semiconductor package design featuring a stack chip structure with first and second bonding chips bonded by bumps and direct bonding, respectively, and an adhesive film that surrounds the bumps and fills the gaps between chips, enhancing thermal conductivity and mechanical stability through a combination of thermal compression and hybrid metal bonding processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically stacked semiconductor chips are bonded using conventional bonding methods, then integration capacity is improved, but thermal properties and manufacturing yield deteriorate
Solution Approach 1:
The patent introduces an adhesive film as an intermediary material between the semiconductor chips and the substrate, and between stacked chips. This adhesive film mediates the thermal and mechanical interface, improving heat dissipation pathways while ensuring reliable bonding. The adhesive film fills gaps and conforms to surface irregularities, creating effective thermal contact without requiring perfect flatness, thus resolving the contradiction between integration capacity and thermal properties.
Solution Approach 2:
The patent employs composite bonding structures combining different bonding mechanisms: bump bonding (solder or metal bumps) for electrical and mechanical connection, and adhesive film bonding for thermal management and mechanical stability. This composite approach leverages the strengths of each bonding method - bumps provide electrical connectivity and structural support, while the adhesive film provides thermal conduction and gap filling - thereby achieving both high integration capacity and improved thermal properties with increased yield.
2Temperature
If multiple bonding methods are used in stack chip structure, then thermal conductivity is improved, but device complexity increases
Solution Approach 1:
The patent segments the bonding function into distinct components: bump structures for electrical connection and adhesive film for thermal management. This segmentation allows each component to be optimized for its specific function - bumps are designed for electrical conductivity and mechanical strength, while the adhesive film is designed for thermal conduction and gap filling. The segmented approach simplifies the overall process by assigning specific roles to each material, reducing the complexity that would arise from attempting to use a single multifunctional bonding method.
Solution Approach 2:
The adhesive film serves multiple functions simultaneously: it provides thermal conduction, mechanical bonding, gap filling, and stress distribution. This multi-functionality reduces device complexity by consolidating several functions into a single material layer, eliminating the need for separate thermal interface materials and bonding adhesives. The bump structures similarly provide both electrical connection and mechanical support. This multi-functional design achieves improved thermal conductivity without proportionally increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances thermal properties and yield by ensuring effective thermal conductivity and mechanical stability in vertically stacked semiconductor chips, improving the overall performance and reliability of the semiconductor package.
Implementation Method 1
the adhesive film surrounds side surfaces of the bumps, fills a region between the first bonding lower chip and the first bonding upper chip
Implementation Method 2
the adhesive film surrounds side surfaces of the bumps, fills a region between the first bonding lower chip and the first bonding upper chip, and protrudes from the region
Data Source
AI summary
A semiconductor package including: a lower chip; a chip structure including stacked semiconductor chips; and an adhesive film, the semiconductor chips include first bonding chips bonded to each other by bumps and second bonding chips directly bonded to each other, the first bonding chips include: a first bonding lower chip including a first bonding upper pad; and a first bonding upper chip on the first bonding lower chip and including a first bonding lower pad, the second bonding chips include: a second bonding lower chip including a second bonding upper insulating layer and a second bonding upper pad; and a second bonding upper chip on the second bonding lower chip and including a second bonding lower insulating layer, and a second bonding lower pad, and the adhesive film surrounds side surfaces of the bumps, fills a region between the first bonding lower and upper chips, and protrudes from the region.