Hybrid Circuit Verification Using Stimulus Generators
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Solution Overview
Problem
Current circuit verification techniques, whether formal, simulation-based, or hybrid, face challenges in efficiently verifying large and complex circuits, as they often require substantial computational resources and may not guarantee desired behavior due to impractical state space coverage.
Innovation Solution
A system that generates a stimulus generator based on circuit assumptions to optimize the circuit design, allowing for logic optimization and functional verification, thereby reducing computational resources and ensuring desired behavior is met.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If formal verification techniques are used to prove circuit behavior, then verification rigor is improved, but computational resource requirements increase significantly
Solution Approach 1:
The verification process is segmented into two distinct phases: a simulation-based pre-verification phase that filters out obviously incorrect designs, and a formal verification phase that only processes designs passing the first phase. This segmentation reduces the computational burden on formal verification while maintaining overall verification rigor.
Solution Approach 2:
A preliminary simulation-based verification is performed before formal verification to eliminate designs with obvious errors. This preliminary action reduces the number of circuits requiring resource-intensive formal verification, thereby lowering overall computational resource requirements while maintaining verification quality.
2Use of energy by moving object
If simulation-based verification techniques are used, then computational resource requirements are reduced, but verification completeness deteriorates due to inability to cover entire state space
Solution Approach 1:
The invention merges simulation-based verification and formal verification into a hybrid approach. The simulation phase handles broad coverage with low resources, while the formal verification phase provides rigorous proof for specific critical paths. This combination achieves both resource efficiency and verification completeness.
Solution Approach 2:
Simulation-based verification is performed as a preliminary step to identify and eliminate obviously incorrect designs before submitting them to formal verification. This preliminary filtering maintains verification completeness by ensuring that only potentially correct designs undergo resource-intensive formal analysis.
3Productivity
If logic optimization is performed on the original circuit, then circuit performance is improved, but verification difficulty increases due to modified circuit structure
Solution Approach 1:
Logic optimization is performed as a preliminary step before verification. By optimizing the circuit first and then applying verification techniques to the optimized version, the invention achieves better performance while managing verification complexity through the hybrid verification approach that handles optimized structures more effectively.
Data Source
AI summary
One embodiment of the present invention provides a system that facilitates optimization and verification of a circuit design. The system can receive a set of assumptions associated with a circuit. The set of assumptions can specify a set of logical constraints on at least a set of primary inputs of the circuit. Note that the set of assumptions are expected to be satisfied during normal circuit operation. The system can generate a stimulus generator based in part on an assumption in the set of assumptions. The output values from the stimulus generator, which when assigned to the set of primary inputs of the circuit, cause the set of primary inputs to satisfy the assumption. Next, the system can generate a modified circuit by coupling the outputs of the stimulus generator with a set of primary inputs of the circuit. The system can then perform logic optimization on the modified circuit to obtain an optimized circuit.