Hybrid Class-S Modulator With PWM Correction for RF Envelope Accuracy
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Solution Overview
Problem
Conventional RF transmitters using quadrature modulators are not power efficient, especially when handling non-constant-envelope signals like EDGE and W-CDMA, due to the need for linear power amplifiers which are inefficient, and existing class-S modulators are not suited for high signal envelope bandwidths.
Innovation Solution
A hybrid class-S modulator circuit that modulates a power supply voltage according to amplitude characteristics, using a digital pulse-width modulator and a correction circuit with an operational amplifier to reduce deviations in voltage levels, allowing for efficient transmission of non-constant envelope signals by sourcing or sinking current to achieve desired voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a linear power amplifier is used to transmit non-constant-envelope signals, then signal distortion is minimized, but power efficiency deteriorates
Solution Approach 1:
The patent segments the modulation function into two independent paths: amplitude modulation and phase modulation. The amplitude modulator handles amplitude variations while the phase modulator handles phase variations, allowing the power amplifier to operate in a more efficient nonlinear mode while still accurately representing the original signal through recombination of these two modulated components.
Solution Approach 2:
The patent introduces an intermediary amplitude modulator stage that processes the signal before it reaches the power amplifier. This amplitude modulator, working in conjunction with the phase modulator, serves as a mediator that prepares the signal in a form that allows efficient power amplification while maintaining signal fidelity through the combined amplitude and phase modulation paths.
2Use of energy by moving object
If a class-S modulator is used to modulate the drain supply, then power efficiency is improved, but the modulator is not suited for high signal envelope bandwidths
Solution Approach 1:
The patent employs dynamic element selection where different modulator circuits are activated based on the signal characteristics. For high bandwidth signals, one set of modulator elements is selected, while for lower bandwidth signals, different elements are activated. This dynamic adaptation allows the system to optimize between power efficiency and bandwidth capability depending on the actual signal requirements.
Solution Approach 2:
The patent changes the operating parameters of the modulator circuit based on signal conditions. By adjusting which modulator elements are active and how they are configured, the system can adapt to different signal envelope bandwidths while maintaining power efficiency. The parameter changes allow the modulator to be versatile across different signal types and bandwidth requirements.
3Measurement precision
If the drive levels to the RF power amplifier are reduced to prevent signal clipping, then signal distortion is minimized, but power efficiency deteriorates
Solution Approach 1:
The patent segments the modulation into amplitude and phase components, allowing the power amplifier to operate at higher drive levels for the phase component while the amplitude component is handled separately by the amplitude modulator. This segmentation prevents clipping in both paths simultaneously, enabling the power amplifier to operate more efficiently without sacrificing signal integrity.
Solution Approach 2:
The patent applies partial modulation through the power amplifier by handling only the phase component through it, while the amplitude component is applied separately. This partial action approach allows the power amplifier to operate at higher efficiency levels without causing clipping, as the amplitude modulator ensures the signal remains within acceptable bounds through its independent control path.
Data Source
AI summary
A hybrid modulator apparatus includes a modulator that amplitude modulates a power supply signal. A correction circuit coupled in parallel with the modulator reduces errors caused by the modulator. In one embodiment the modulator includes a digital pulse-width modulator (PWM) and a buck converter. The K most significant bits (MSBs) of N-bit input digital words are used by the digital PWM and a buck converter to generate an amplitude modulated power supply signal having a plurality of quantized voltage levels. The remaining N−K bits of each N-bit words may be used to dither the input drive to the PMW, to produce an error signal at the output of the modulator representing quantization errors caused by only applying the K MSBs to the PWM. The correction circuit compares the error signal to a signal formed form all N bits of the N-bit words in reducing the quantization errors.


