Hybrid System Clock Synchronization via Dynamic Frequency Regulation
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Solution Overview
Problem
Hybrid electronic systems experience significant timing deviations and error conditions due to the lack of synchronization between emulator and simulated platforms operating at different clock frequencies, leading to issues like timeouts and errors in task execution.
Innovation Solution
A mechanism is introduced to dynamically adjust the clock frequency on the simulated side of the platform based on the speed ratio between the emulator and simulated sides, using a RunMonitor function to calculate and regulate the clock frequency, ensuring synchronized time advancement across both platforms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If free-running execution mode is used where different platforms run independently at their respective maximum speeds, then overall system speed is improved, but timing deviations between platforms increase significantly
Solution Approach 1:
The patent implements dynamic clock frequency adjustment on the simulated side platform based on real-time speed ratio calculations. The RunMonitor function continuously monitors execution speeds and dynamically recalculates clock frequencies to maintain synchronization, allowing the system to adapt its timing characteristics during operation while preserving high overall performance
Solution Approach 2:
The patent employs a feedback mechanism where the RunMonitor function calculates the speed ratio between emulator and simulated platforms, uses this information to determine appropriate clock frequency adjustments, and applies these adjustments to maintain synchronized time advancement. This closed-loop control eliminates timing deviations while preserving the benefits of free-running execution
2Reliability
If clock frequency is dynamically adjusted on the simulated side based on speed ratio, then timing synchronization is improved, but system complexity increases
Solution Approach 1:
The patent introduces a RunMonitor function as an intermediary component that mediates between the emulator platform and simulated platform. This intermediary calculates speed ratios and determines clock frequency adjustments, isolating the complexity of the regulation mechanism from the core simulation functionality while maintaining simple interfaces to both platforms
Solution Approach 2:
The patent regulates timing synchronization by dynamically changing the clock frequency parameter on the simulated side platform. By adjusting this single critical parameter based on speed ratio calculations, the system achieves synchronization without requiring complex structural modifications to either platform
Data Source
AI summary
A hybrid electronic system including an emulator side including a processor and a first clock, a simulated side including one or more models to simulate one or more prototypes and a second clock, a first interface to the emulator side, and a second interface to the simulated side is disclosed. The processor is configured to determine using the first interface a first amount of time corresponding to an amount of time advanced on the emulator side by the first clock. The processor is configured to determine using the second interface a second amount of time corresponding to an amount of time advanced on the simulated side by the second clock, and set a value of a clock frequency of the second clock based on an initial value of the clock frequency of the second clock and a ratio of the first amount of time to the second amount of time.