Hybrid Clock Module for Packet-Switched Network Time Distribution
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Solution Overview
Problem
Current clock synchronization methods in packet-switched networks, such as IEEE 1588-2008, face challenges in complexity and noise accumulation with Boundary Clocks, and 'layer violations' with Transparent Clocks, leading to inefficiencies and inaccuracies in time reference distribution.
Innovation Solution
A clock module with a slave port, master port, and local clock that receives synchronization packets, calculates internal propagation time, and generates new timestamps to distribute a time reference, combining the simplicity of Transparent Clocks with the manageability of Boundary Clocks while avoiding layer violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Boundary Clocks are used to distribute time reference in packet-switched networks, then flexibility and automatic reconfiguration capability are improved, but implementation complexity and noise accumulation increase
Solution Approach 1:
The patent extracts the time reference distribution function from the complex Boundary Clock implementation by using Transparent Clocks that simply forward PTP messages with delay compensation, eliminating the need for local time recovery and complex BMCA participation while maintaining network adaptability
2Device complexity
If Transparent Clocks are used to distribute time reference, then simplicity and noise reduction are improved, but protocol layer separation principles are violated
Solution Approach 1:
The patent introduces a hybrid clock module as an intermediary that combines Transparent Clock forwarding capability with Boundary Clock time recovery function. This mediator forwards PTP messages while inserting delay measurements, maintaining protocol layer separation by properly handling timestamps at the appropriate protocol level
Solution Approach 2:
The patent creates a composite clock module that integrates features of both Transparent Clocks and Boundary Clocks into a single hybrid implementation, combining the simplicity of TC message forwarding with the protocol-compliant timestamp handling of BC time recovery
3Measurement precision
If Timestamps are updated within packets during transmission, then synchronization accuracy is improved, but layer violation occurs when modifying packet headers
Solution Approach 1:
The patent applies preliminary action by pre-calculating and inserting delay compensation values into the PTP message correction field before forwarding, rather than modifying packet headers during transmission. This maintains protocol compliance while achieving synchronization accuracy through advance preparation
Data Source
AI summary
The invention is directed to a clock module and method for distributing a time reference to at least one clock in a packet-switched network. The clock module includes a slave port, a master port and a local clock. The method comprises the steps of receiving a first synchronization packet at the slave port, the first synchronization packet comprising a first master clock timestamp and generating at least one internal signal comprising the first master clock timestamp. The method also includes the steps of transmitting the at least one internal signal to the master port and receiving the at least one internal signal at the master port. Then a method includes determining the internal propagation time of the signal through the clock module and generating a second synchronization packet at the master port comprising a second master clock timestamp, the second master clock timestamp comprising the sum of the first master clock timestamp and the internal propagation time. Finally, the second synchronization packet is sent to at least one other clock in the packet-switched network.