Hybrid CMOS Micro-LED Layout for Uniform Four-Side Current Injection

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Solution Overview

Problem

Existing CMOS power plane layouts for microLED displays face challenges in uniformly distributing current, leading to high current density and reliability issues due to non-uniform current distribution and excessive Ohmic losses.

Innovation Solution

A CMOS power plane layout with alternating Vled and Vcat contact areas and a large cathode redistribution ring to uniformly distribute current along the four sides of the die area, using additional layers in parallel to reduce Ohmic losses and simplify manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the number of metal layers for power planes is minimized to reduce manufacturing complexity, then device complexity is reduced, but current distribution uniformity deteriorates leading to current crowding effects

Engineering Contradiction:
Improvenumber of metal layersVSAvoidcurrent distribution uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The power plane is segmented into multiple functional zones including cathode contact areas, Vled contact areas, and redistribution rings distributed across the substrate. This segmentation allows current to be distributed through multiple pathways rather than concentrated in single layers, achieving uniform current distribution while maintaining a minimal number of metal layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from vertical stacking of multiple metal layers to a planar two-dimensional distribution network. By arranging cathode contacts, Vled contacts, and redistribution rings in alternating patterns across the substrate plane, the design achieves three-dimensional current distribution effects using primarily two-dimensional routing, reducing the need for additional metal layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Illumination intensity

If current density is increased to improve pixel brightness control, then display performance is improved, but heat losses and electromigration reliability issues worsen

Engineering Contradiction:
Improvepixel brightnessVSAvoidelectromigration resistance
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

Different regions of the power plane are designed with locally optimized properties. Cathode contact areas feature higher density interconnects for current collection, while Vled contact areas and redistribution rings are spaced to provide current distribution. This local quality variation allows high current density where needed for brightness while distributing heat and current stress to protect against electromigration in critical interconnect regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Redistribution rings serve as intermediary structures between cathode contacts and Vled contacts. These rings collect current from cathode contacts and redistribute it to multiple Vled contacts, acting as current mediators that prevent excessive current concentration at single points. This intermediary function reduces peak current density and associated heat generation while maintaining the ability to drive pixels at required brightness levels.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12433080B2Hybrid CMOS micro-LED display layout
Publication Date: 2025.09.30 LUMILEDS SINGAPORE PTE LTD
  • US12433080B2 patent drawing
  • US12433080B2 patent drawing
  • US12433080B2 patent drawing

AI summary

Described is a CMOS power plane including interleaving contact areas, alternating Vled and Vcat contact areas, on at least two long sides of the μLED display area. By this way, Vled and cathode current are injected uniformly along the four sides of the μLED display panel. A large cathode current distribution ring on Vled and Vcat circuits is used to distribute the current along the four sides of the panel. The current distribution ring surrounds a pixel die area. An insulated area may be included on the cathode current redistribution ring adjacent one of the of μbumps.