Hybrid Capacitive-Resistive DAC Layout for Lower Area and Power
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Solution Overview
Problem
Existing analog to digital converters (ADCs) and digital to analog converters (DACs) occupy significant circuit area and consume high power, which increases the cost of integrated circuits.
Innovation Solution
A hybrid capacitive resistive DAC is introduced, which includes both a capacitive DAC and a resistive DAC. The resistive DAC is designed with fewer resistors and switches compared to conventional designs, resulting in a more compact and power-efficient solution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional DAC designs with full resistor arrays are used, then conversion precision is maintained, but circuit area and power consumption increase significantly
Solution Approach 1:
The patent divides the DAC into multiple sub-DACs, each handling specific bit ranges. The first sub-DAC converts MSBs using a capacitive array, while the second sub-DAC converts LSBs using a resistive array. This segmentation allows each sub-DAC to use optimized component sets for its specific function, reducing overall circuit area while maintaining precision.
Solution Approach 2:
The patent changes the operational parameters of different DAC sub-arrays based on bit significance. MSB conversion uses capacitive switching with higher weight, while LSB conversion uses resistive switching with lower weight. This parameter differentiation allows precise conversion across the full dynamic range without requiring a complete high-precision resistor array for all bits.
2Measurement precision
If conventional DAC designs with full resistor arrays are used, then conversion precision is maintained, but power consumption increases significantly
Solution Approach 1:
The patent segments the DAC functionality into capacitive switching for MSBs and resistive switching for LSBs. This segmentation reduces power consumption because capacitive switching requires minimal charge transfer for MSB changes, while resistive switching handles only the lower-power LSB adjustments, avoiding the high continuous power draw of a full resistive array.
Solution Approach 2:
The patent applies different switching mechanisms based on bit significance parameters. Capacitive switching is used for MSBs where small voltage changes have large impact, requiring minimal energy. Resistive switching is used for LSBs where fine adjustments are needed but power consumption must be limited. This parameter-based approach optimizes power efficiency across the conversion range.
3Measurement precision
If high-resolution ADCs and DACs are implemented, then conversion accuracy is improved, but integrated circuit cost increases
Solution Approach 1:
The patent segments the high-resolution conversion task into multiple lower-complexity sub-DACs. Each sub-DAC handles a portion of the bit resolution, allowing the use of simpler, less expensive component sets for each segment rather than requiring expensive high-precision components throughout the entire conversion chain.
Solution Approach 2:
The patent changes the precision requirements of different DAC sections based on their functional role. MSB conversion requires coarser precision handled by capacitive arrays, while LSB conversion requires finer precision handled by resistive arrays. This differential precision approach reduces overall manufacturing cost while achieving the required total conversion accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution reduces the circuit area and power consumption of ADCs and DACs, leading to lower integrated circuit costs while maintaining performance.
Implementation Method 1
The capacitive DAC is configured to convert N most significant bits (MSBs) of the digital value to an analog signal
Implementation Method 2
The resistive DAC is configured to covert M-N least significant bits (LSBs) of the digital value to an analog signal
Data Source
Figure 1
Figure 2
Figure 3A~5
AI summary
A digital-to-analog converter (DAC) (100) for converting an M bit digital value to an analog signal includes a capacitive DAC (104) and a resistive DAC (116). The capacitive DAC (104) is configured to convert N most significant bits of the digital value to an analog signal. The resistive DAC (116) is configured to covert M-N least significant bits (LSBs) of the digital value to an analog signal. The resistive DAC (116) includes a coarse DAC (106) and a fine DAC (108). The coarse DAC (106) is configured to convert a most significant R bits of the M-N least significant bits to an analog signal. An output of the coarse DAC (106) is switchably coupled to a first capacitor of the capacitive DAC (104). The fine DAC (108) is configured to convert M-N-R least significant bits of the M-N least significant bits toan analog signal. An output of the fine DAC (108) is switchably coupled to a secondcapacitor of the capacitive DAC (104).