Hybrid DAC Architecture for Precision Without Output Buffers
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Solution Overview
Problem
Digital-to-analog conversion (DAC) circuits face challenges in achieving high precision without incurring the costs of additional output buffers, particularly in systems with multiple conversion channels, where the string configuration is susceptible to process mismatch and the ladder configuration increases layout area and power consumption.
Innovation Solution
A hybrid DAC architecture that combines a resistor string circuit and a resistor ladder circuit, where the resistor string circuit is controlled by low-order bits and the resistor ladder circuit by high-order bits, using a string current source and bridge resistor to minimize integral non-linear errors and reduce layout area, eliminating the need for additional output buffers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a string configuration DAC circuit is used, then space efficiency and power efficiency are improved, but manufacturing precision deteriorates due to susceptibility to process mismatch
Solution Approach 1:
The patent merges the string configuration and ladder configuration into a hybrid architecture. The string circuit processes low-order bits while the ladder circuit processes high-order bits, combining the space/power efficiency of string configuration with the process mismatch immunity of ladder configuration.
Solution Approach 2:
The digital input signal is segmented into high-order bits and low-order bits. The ladder circuit handles high-order bits and the string circuit handles low-order bits, allowing each subsystem to operate in its optimal performance regime.
2Manufacturing precision
If a ladder configuration DAC circuit is used, then manufacturing precision is improved by reducing process mismatch sensitivity, but device area increases
Solution Approach 1:
The DAC circuit is segmented into two parts: a ladder circuit for high-order bits requiring high precision but occupying more area, and a string circuit for low-order bits occupying less area. This segmentation allows the overall layout area to be reduced while maintaining precision where critical.
Solution Approach 2:
Different parts of the circuit are assigned different configurations based on local requirements: the ladder configuration is used where precision is critical (high-order bits) and the string configuration is used where area efficiency is critical (low-order bits).
3Manufacturing precision
If additional output buffers are added to a voltage-driven string circuit, then manufacturing precision is improved by minimizing INL and DNL errors, but power consumption and device area increase
Solution Approach 1:
The patent extracts the precision-critical functionality from the output buffer and places it directly in the string circuit by using current sources at each tap point. This eliminates the need for separate output buffers while maintaining precision.
Solution Approach 2:
Current sources are introduced as intermediaries between the string resistors and the output, providing precise current control that eliminates the need for additional output buffers to achieve precision.
4Manufacturing precision
If additional output buffers are added to a voltage-driven string circuit, then manufacturing precision is improved by minimizing INL and DNL errors, but device area increases
Solution Approach 1:
The precision functionality is extracted from the output buffer and integrated directly into the string circuit through current sources at each tap, eliminating the need for separate output buffer circuits and reducing layout size.
Data Source
Figure 1
Figure 2~3
AI summary
In described examples, a digital-to-analog conversion (DAC) circuit (100) has a resistor ladder circuit (130) controlled by high order bits (D[n+l :N]) and a resistor string circuit (110) controlled by low order bits (D[l :n]). The resistor ladder circuit (130) includes a stem resistor (131) and a branch resistor (132). The stem resistor (131) has a stem resistance, and the branch resistor (132) has a branch resistance that is substantially equal to two times of the stem resistance. The resistor string circuit (110) includes a string current source (120), a string resistor (114), and a bridge resistor (117). The string current source (120) is configured to generate a string current that is based on a ratio of a reference voltage divided by a predetermined resistance. The string resistor (114) has a string resistance that corresponds to the predetermined resistance, and it is configured to selectively receive the string current based on a selection signal (143) decoded from the low order bits (D[l :n]).