Hybrid Digital Data Processing System With Interconnection Module
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Solution Overview
Problem
Current digital data processing systems for video signals, such as those used for temporal noise reduction and other operations like luminance/chrominance separation and deinterlacing, are cumbersome due to their reliance on iterative calculations and the use of buffer memories, and existing solutions whether purely hardware or software-based face inflexibility, high production costs, or complex design issues.
Innovation Solution
A digital data processing system comprising slave processing units, an interconnection module for data transfer, and a control unit that separates control and processing functions, utilizing programmable and non-programmable units with shared memory and DMA capabilities to efficiently transfer and process multimedia data, including video pixels, with features like unsolicited processing deactivation and multiplexing to optimize resource use.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If purely hardware solutions are used for video processing, then processing performance is improved, but device complexity and design difficulty increase
Solution Approach 1:
The system divides video processing into two distinct segments: a hardware acceleration unit for computationally intensive operations (motion detection, filtering calculations) and a software control unit for managing data flow and coordinating operations. This segmentation allows the hardware to handle performance-critical tasks while the software manages complexity, resolving the contradiction between processing performance and design difficulty.
2Adaptability or versatility
If purely software solutions are used for video processing, then flexibility and ease of implementation are improved, but processing speed and performance deteriorate
Solution Approach 1:
The system merges software and hardware approaches into a hybrid architecture where the hardware acceleration unit provides fast processing for standard operations while the software control unit maintains flexibility for adapting to different processing requirements. This combination resolves the contradiction by achieving both high processing speed through hardware and flexibility through software control.
3Productivity
If buffer memories are used for storing video data, then processing capability is improved, but device complexity and production cost increase
Solution Approach 1:
The system extracts the buffer memory requirement from the overall system architecture by implementing a streamlined data flow where data is processed in real-time streams with minimal buffering. The hardware acceleration unit processes data as it arrives, eliminating the need for large buffer memories while maintaining processing capability, thus resolving the contradiction between processing capability and device complexity.
4Manufacturing precision
If iterative calculations are used for noise reduction and filtering, then processing quality is improved, but processing time and complexity increase
Solution Approach 1:
The system performs preliminary action by pre-calculating filter coefficients and motion compensation parameters in advance, storing them in registers for rapid access during iterative processing. This preparation eliminates the need for time-consuming calculations during the actual noise reduction and filtering operations, maintaining high processing quality while significantly reducing processing time.
Data Source
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AI summary
The system has slave processing units (14) for execution of elementary functions. An interconnection module (10) communicates with a data transfer network (SoC), and transfers data between the slave processing units and the network. A control unit (18) of the interconnection module controls transfer of data between the slave processing units and the network. The slave processing units are formed of non-programmable hardware processing units (14a-14d) and a programmable processing unit (16). A shared memory (20) is associated with the programmable processing unit. An independent claim is also included for a method for processing digital signals.