Hybrid Encryption Chip and CPU Data Processing
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Solution Overview
Problem
Current data encryption and decryption methods face challenges in efficiently processing large volumes of data, leading to delays and reduced processing efficiency due to the limitations of central processing units (CPU).
Innovation Solution
A method that selects between a hardware encryption/decryption chip and a software program running on a CPU based on the size of the data and predicted processing delays to optimize data processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data encryption or decryption is performed using a specified software program on a CPU, then the processing can be completed sequentially for each data block, but the processing capability of the CPU cannot meet the data encryption or decryption delay requirement when there is a large amount of data
Solution Approach 1:
The patent segments the data processing task by dividing data into multiple data blocks and distributing them across multiple processor cores. Each processor core independently processes assigned data blocks in parallel, transforming the sequential processing bottleneck into a parallel processing architecture that meets delay requirements while maintaining high throughput for large data volumes
Solution Approach 2:
The patent replaces the general-purpose CPU software processing mechanism with a dedicated hardware encryption/decryption chip. This hardware substitution provides specialized processing capability that achieves both low latency for individual blocks and high throughput for large data volumes, resolving the contradiction between delay requirements and processing efficiency
2Productivity
If a hardware encryption/decryption chip is used for processing, then the processing speed and efficiency are improved, but the device complexity increases
Solution Approach 1:
The patent implements a dynamic processing mode selection mechanism that adapts to different data volumes and processing requirements. The system can switch between software-based CPU processing and hardware chip processing, allowing it to optimize for either low complexity (small data) or high efficiency (large data) scenarios, thereby resolving the contradiction between processing efficiency and device complexity
Solution Approach 2:
The patent designs a hybrid processing system that incorporates both software processing capabilities on the CPU and hardware encryption/decryption chip capabilities. This multi-functional architecture allows the system to handle various data volumes and processing requirements using the most appropriate method, achieving high productivity while managing device complexity through flexible resource utilization
Data Source
AI summary
A data encryption or decryption method includes obtaining a data processing request carrying to-be-processed data; selecting one of a first processing manner and a second processing manner as a processing manner for the to-be-processed data. In the first processing manner, processing is performed by an encryption/decryption chip. In the second processing manner, processing is performed by a software program running on a central processing unit.