Hybrid Erase Scheme for Non-Volatile Memory Voltage Margin
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Solution Overview
Problem
Current non-volatile memory technologies face inefficiencies in erase operations, particularly in three-dimensional memory structures, where stripe erase methods are slower and more prone to tunnel oxide wear-out compared to normal erase methods, and there is a need for a hybrid approach that combines the advantages of both to improve data retention and erase speed.
Innovation Solution
Implementing a hybrid erase scheme that follows a normal erase operation with a stripe erase operation, where every other wordline is biased differently to aggregate holes under wordlines, reducing trapped holes between them, without requiring higher erase voltages, thus optimizing erase efficiency and data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stripe erase operation is used to improve data retention, then voltage margin is improved, but erase speed decreases and tunnel oxide wear-out increases
Solution Approach 1:
The erase operation is segmented into two distinct phases: a normal erase phase that erases all wordlines simultaneously for speed, followed by a stripe erase phase that selectively erases alternating wordlines to improve voltage margin. This segmentation allows each phase to optimize for its specific purpose without compromising the other.
Solution Approach 2:
The hybrid erase employs periodic alternating patterns in the stripe erase phase, where every other wordline is erased in succession rather than simultaneously. This periodic action redistributes holes uniformly across all wordlines, improving data retention while maintaining reasonable erase speed through the initial normal erase phase.
2Reliability
If stripe erase operation is used to improve data retention, then voltage margin is improved, but tunnel oxide wear-out increases
Solution Approach 1:
Instead of performing a complete stripe erase on all wordlines (excessive action), the hybrid erase applies stripe erase only to alternating wordlines (partial action). This partial application achieves the hole redistribution benefit for improved data retention while reducing the cumulative stress on tunnel oxide compared to full stripe erase.
Solution Approach 2:
The erase operation is segmented into two distinct phases: a normal erase phase that erases all wordlines simultaneously for speed, followed by a stripe erase phase that selectively erases alternating wordlines to improve voltage margin. This segmentation allows each phase to optimize for its specific purpose without compromising the other.
3Productivity
If normal erase operation is used to improve erase speed, then productivity is improved, but data retention and voltage margin deteriorate
Solution Approach 1:
The hybrid erase merges the advantages of normal erase (speed) and stripe erase (data retention) into a single composite operation. The normal erase phase provides rapid initial erasure, while the subsequent stripe erase phase corrects voltage margin issues, achieving both speed and reliability benefits.
Solution Approach 2:
The normal erase phase is performed first as a preliminary action to quickly erase all wordlines, establishing a baseline erased state. This preliminary fast erase is then followed by the stripe erase phase that refines the voltage margin characteristics, combining the speed benefit of the first phase with the reliability benefit of the second.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid erase method enhances data retention and erase speed, offering better beginning-of-life and end-of-life voltage margins while reducing erase defects and tunnel oxide wear-out, outperforming both standard normal and stripe erase techniques.
Implementation Method 1
every other wordline is biased differently to aggregate holes under wordlines, reducing trapped holes between them
Data Source
AI summary
A storage device is disclosed. The storage device is configured to perform a hybrid erase scheme comprising: performing an erase operation including simultaneously erasing memory cells associated with a block; and performing a stripe erase operation including simultaneously erasing memory cells associated with every other wordline of the block and then simultaneously erasing memory cells associated with remaining wordlines of the block.


