Hybrid Error Recovery in Memory Sub-Systems
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Solution Overview
Problem
Conventional memory sub-systems face a trade-off between achieving high performance and high reliability due to the fixed sequence of read retry operations used for error recovery, which can lead to read corruption and increased resource utilization.
Innovation Solution
A hybrid error recovery process is managed in a memory sub-system, where the memory sub-system controller determines the request type for each memory access operation (from a host system or a background operation) and adjusts the sequence of read retry operations accordingly, using different sets of demarcation voltages to balance reliability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed sequence of read retry operations is used for error recovery, then reliability is improved, but performance deteriorates due to increased resource utilization and read corruption
Solution Approach 1:
The patent implements a dynamic error recovery mechanism that adjusts the read retry sequence based on the type of memory access operation. Host system requests receive a first read retry sequence optimized for performance, while background requests receive a second read retry sequence optimized for reliability. This dynamic adaptation resolves the contradiction by allowing the system to switch between different error recovery strategies depending on the operational context.
Solution Approach 2:
The patent applies different error recovery characteristics to different types of requests. Host system requests are treated differently from background requests, with each category receiving a tailored read retry sequence. This local differentiation allows the system to optimize for performance where it matters most (host requests) while maintaining adequate reliability for background operations.
2Reliability
If read retry operations are increased for all requests, then reliability is improved, but resource utilization increases and performance deteriorates
Solution Approach 1:
The patent applies the principle of partial action by providing enhanced error recovery (more read retry operations) only where necessary - specifically for background requests - while using a more efficient, fewer retry sequence for host requests. This selective application of error recovery measures resolves the contradiction by avoiding excessive resource consumption for requests that don't require it, while maintaining reliability where it is critical.
3Device complexity
If a uniform error recovery process is applied to all memory access operations, then simplicity is maintained, but adaptability to different request types deteriorates
Solution Approach 1:
The patent segments the error recovery process into distinct sequences for different request types. Instead of a single uniform process, there are at least two separate read retry sequences: one for host system requests and another for background requests. This segmentation allows the system to adapt to different request types while maintaining manageable complexity through clear separation of recovery strategies.
Data Source
AI summary
A request to perform a memory access operation on a plurality of memory cells of a memory device is received. In response to determining that the request is from a host, a first error recovery operation is performed, wherein the first error recovery operation is associated with a first plurality of demarcation voltages. In response to determining that the request is from a controller, a second error recovery operation is performed, wherein the second error recovery operation is associated with a second plurality of demarcation voltages, wherein the second plurality of demarcation voltages comprises a greater number of demarcation voltages than the first plurality of demarcation voltages.