Hybrid Quantum Error Mitigation via Restricted Evolution
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Solution Overview
Problem
Existing error mitigation techniques for quantum computers require exponential computational overhead and sampling, making them impractical for larger systems, and existing methods like zero-noise extrapolation and probabilistic error cancellation are either biased or computationally expensive, lacking a flexible and efficient approach for near-term quantum devices.
Innovation Solution
A method for hybrid error mitigation by restricted evolution (HEMRE) that includes generating an updated quantum circuit configuration using quasi-probabilistic decompositions, executing it multiple times, and averaging results to achieve an accurate expectation value with adjustable runtime and reduced sampling overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing error mitigation techniques (zero-noise extrapolation or probabilistic error cancellation) are used, then error mitigation is achieved, but computational overhead and runtime become exponential
Solution Approach 1:
The patent applies partial action by using restricted evolution where quantum circuits are executed for a limited number of steps rather than full evolution. This partial execution reduces the computational overhead from exponential to polynomial while still capturing sufficient quantum behavior for error mitigation, trading off some accuracy for practical computational feasibility
Solution Approach 2:
The patent changes the parameter of circuit evolution depth from unlimited to restricted (limited steps). By controlling the evolution parameter, the method achieves error mitigation with reduced sampling overhead and polynomial runtime, directly addressing the exponential overhead problem of traditional methods
2Measurement precision
If quantum circuits are executed with full evolution to reduce bias, then measurement accuracy improves, but runtime increases exponentially
Solution Approach 1:
The patent uses partial evolution by restricting quantum circuit execution to a limited number of steps. This partial action provides a practical balance where sufficient quantum behavior is captured for accurate expectation value estimation without requiring full evolution that would take exponential time
Solution Approach 2:
The patent performs preliminary restriction of evolution depth before execution. By pre-determining a limited number of evolution steps based on bias tolerance requirements, the method prepares the circuit configuration to achieve acceptable accuracy within polynomial runtime rather than attempting full evolution
3Reliability
If the number of sampling measurements is increased to reduce noise influence, then result reliability improves, but computational overhead becomes exponential
Solution Approach 1:
The patent changes the parameter of evolution depth from unlimited to restricted, which fundamentally alters the scaling behavior. This parameter change reduces the sampling overhead from exponential to polynomial while maintaining sufficient result reliability for practical applications
Data Source
AI summary
A method for mitigating error in a quantum computing device can include receiving a quantum circuit configuration including a plurality of quantum gates, and generating an updated quantum circuit configuration by replacing a first gate among the plurality of quantum gates with at least one implemental quantum gate selected from among a set of implementable quantum gates based on a generalized quasi-probabilistic decomposition including a positive component and replacing a second gate among the plurality of quantum gates with at least two implemental quantum gates selected from among the set of implementable quantum gates based on a full quasi-probabilistic decomposition including a positive component and a negative component. Also, the method can further include executing the updated quantum circuit configuration, by the quantum computing device, to generate an expectation value.