Hybrid Executor Layer for Dynamic Hardware Acceleration

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Solution Overview

Problem

Conventional computer program development requires complex and time-consuming processes to hardware accelerate functions, limiting the number of programs that can benefit from hardware acceleration, and necessitates re-development and re-deployment when acceleration decisions change, especially across different computer systems.

Innovation Solution

A software library with compute identifiers paired with a hardware library containing hardware accelerated functions, allowing a hybrid executor layer to dynamically determine at runtime whether to execute functions using a processor or a hardware accelerator based on acceleration criteria and rules, enabling acceleration-ready programs to run on systems with or without hardware acceleration without modification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional program development processes are used to hardware accelerate functions, then hardware acceleration can be achieved, but the development process becomes complex and time-consuming

Engineering Contradiction:
Improvehardware acceleration capabilityVSAvoiddevelopment process complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent introduces a hybrid executor layer as an intermediary between the software library and hardware accelerator. This layer automatically manages the complexity of hardware acceleration by handling function matching, resource allocation, and execution coordination, thereby enabling hardware acceleration without requiring developers to undergo complex development processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables self-service hardware acceleration where the hybrid executor layer autonomously determines which functions to accelerate, matches them with appropriate hardware resources, and manages execution without human intervention. The compute identifiers automatically facilitate function matching between software and hardware libraries

Inventive Principle:
Principle #25Self-service

2Speed

If hardware acceleration is implemented for specific functions, then execution speed improves, but the program must be re-developed and re-deployed when acceleration decisions change

Engineering Contradiction:
Improvefunction execution speedVSAvoidre-development and re-deployment time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent implements dynamic function acceleration where the hybrid executor layer can change acceleration decisions at runtime based on system state, resource availability, and performance requirements. Functions can be dynamically switched between software execution and hardware acceleration without requiring program re-development or re-deployment

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The hybrid executor layer serves multiple functions: it executes software functions directly, matches functions with hardware accelerators, manages resource allocation, and handles runtime decisions. This multi-functional approach eliminates the need for separate development processes for different acceleration scenarios

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If hardware acceleration is used, then performance improves, but the program cannot execute on systems without hardware accelerators

Engineering Contradiction:
Improveprocessing performanceVSAvoidsystem compatibility
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal execution framework where the hybrid executor layer can operate in multiple modes: it can execute functions using software-only implementation on systems without hardware accelerators, or switch to hardware-accelerated execution on systems with available hardware. This enables the same program to run across diverse system configurations

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes execution parameters dynamically based on system capabilities. The hybrid executor layer detects available hardware resources and adjusts its execution strategy accordingly, switching between software execution and hardware acceleration modes to maintain compatibility across different system configurations

Inventive Principle:
Principle #35Parameter changes

4Ease of operation

If manual hardware acceleration management is implemented, then acceleration can be controlled, but the number of programs that can benefit from hardware acceleration is limited

Engineering Contradiction:
Improveacceleration controlVSAvoidnumber of accelerated programs
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The hybrid executor layer provides self-service automation where functions with compute identifiers are automatically matched with corresponding hardware accelerated functions. This eliminates the need for manual acceleration management while enabling a much larger number of programs to benefit from hardware acceleration through automatic function matching and execution

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11886854B1Acceleration-ready program development and deployment for computer systems and hardware acceleration
Publication Date: 2024.01.30 XILINX INC
  • US11886854B1 patent drawing
  • US11886854B1 patent drawing
  • US11886854B1 patent drawing

AI summary

Acceleration-ready program development includes providing a software library having a plurality of functions having compute identifiers. The software library is associated with a hardware library including one or more hardware accelerated functions. The hardware accelerated functions are associated with the compute identifiers. Each hardware accelerated function is a functional equivalent of a function of the software library having the same compute identifier. A hybrid executor layer is provided that, when executed by a data processing system with an acceleration-ready computer program built using the software library, is configured to initiate execution of a selected function of the acceleration-ready computer program using a processor of the data processing system or invoke a hardware accelerated function having a compute identifier matching the compute identifier of the selected function based on comparing acceleration criteria with acceleration rules.