Hybrid FIFO Interface for Hardware-Software Data Transfer
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Solution Overview
Problem
Conventional interfaces for data transfer between hardware emulators and simulation software, such as DPI and SCE-MI, are cumbersome and require significant developer effort, making it difficult to move functionality between hardware and software for advanced verification scenarios.
Innovation Solution
A seamless FIFO-based interface for data transfer that allows moving hardware emulated functionalities into simulation software and vice versa, using a hybrid FIFO that includes a buffer array in software and memory in hardware, with push and pop pointers to facilitate efficient data transfer and reduce developer effort.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional interfaces (DPI, SCE-MI) are used for data transfer between hardware emulator and simulation software, then data transfer functionality is achieved, but developer effort and complexity increase significantly
Solution Approach 1:
The patent introduces a hybrid FIFO interface as an intermediary component between hardware emulator and simulation software. This FIFO buffer acts as a mediator that simplifies data transfer operations by providing a standardized queue-based interface, eliminating the need for developers to work directly with complex DPI or SCE-MI protocols. The FIFO handles data buffering, synchronization, and protocol conversion internally, presenting a simple push-pop interface to developers.
2Adaptability or versatility
If functionality is moved between hardware and software for advanced verification, then verification capabilities are improved, but development time and effort increase
Solution Approach 1:
The hybrid FIFO interface is designed as a universal communication mechanism that works across different verification scenarios and functional partitions. It provides a standardized interface that can handle various data transfer patterns between hardware and software components, making it adaptable to different verification needs without requiring scenario-specific interface implementations. This multi-functionality reduces development time by providing a ready-to-use framework.
3Speed
If hybrid FIFO with buffer array in software and memory in hardware is used, then data transfer speed increases, but resource consumption (primary input/output and gate area) increases
Solution Approach 1:
The FIFO interface is segmented into two distinct parts: a software-based buffer array and a hardware-based memory component. This segmentation allows each part to be optimized for its specific role - the software buffer handles flexible data management while the hardware memory provides fast storage. The divided architecture enables selective resource allocation, reducing overall gate area compared to implementing the entire FIFO in hardware.
Data Source
AI summary
An interface, a method, and a system are provided. In one or more aspects, the interface is for data transfer between simulation software and a hardware emulator associated with an integrated circuit design and includes a data producer to push a number of elements. A data element includes variable bits of data and variable bits of control information. A first-in-first-out (FIFO) receives the elements pushed by the data producer and stores pushed elements. A data consumer requests the pushed elements from the FIFO. The FIFO includes a buffer array, memory, a first push pointer and a first pop pointer associated with the buffer array, and a second push pointer and a second pop pointer associated with the memory. The buffer array stores elements in software and the memory stores elements in hardware. The interface facilitates moving a portion of hardware emulator functionalities into the simulation software and vice-versa at runtime by utilizing the FIFO.