Hybrid Hard Disk Cache Control Using SSD Mediator

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Solution Overview

Problem

Hybrid hard disk drives (H-HDDs) face challenges in cache management due to low computing speed of their control modules, leading to decreased access speed and shortened SSD life, as well as issues with cache data consistency during reboot and startup processes.

Innovation Solution

The implementation of a cache control method using a solid-state drive (SSD) as a cache for the HDD, where cache management information is stored in a nonvolatile memory and loaded at startup, and the SSD is used to enhance performance by managing cache data efficiently, even with low computing speed control modules, and ensuring cache data consistency across reboots.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a hybrid hard disk drive uses flash memory as a cache device, then access speed is improved, but the control module's low computing speed causes cache management to deteriorate

Engineering Contradiction:
Improveaccess speedVSAvoidcache management performance
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent introduces a CPU as an intermediary component between the host and the cache control. The CPU executes cache control programs that manage the flash memory cache, thereby compensating for the low computing speed of the control module. This mediator approach allows the system to achieve fast cache management without requiring the control module to have high computing power.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If cache control is performed by the control module, then device complexity is reduced, but cache data consistency during reboot is compromised

Engineering Contradiction:
Improvecontrol structureVSAvoidcache data consistency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The CPU serves as a mediator that takes over cache control responsibilities during reboot scenarios. The control module maintains simplicity by not implementing complex cache management, while the CPU-based cache control program ensures data consistency is maintained during system reboots and startup processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by executing cache control programs on the CPU before and during reboot processes. This preliminary management of cache data ensures consistency is maintained before the system fully restarts, preventing data loss or corruption during the transition.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the control module manages cache data, then device complexity is reduced, but SSD life is shortened

Engineering Contradiction:
Improvecontrol structureVSAvoidSSD life
Core Design Contradiction:
Device complexityVSDuration of action of stationary object

Solution Approach 1:

The CPU acts as an intermediary that performs cache management operations, thereby reducing the workload on the control module. This distribution of tasks prevents excessive wear on the SSD from frequent write operations by the control module, thereby extending SSD lifespan while maintaining a simple control structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUSRE49417E1Information processing apparatus and cache control method
Publication Date: 2023.02.14 KIOXIA CORP
  • USRE49417E1 patent drawing
  • USRE49417E1 patent drawing
  • USRE49417E1 patent drawing

AI summary

According to one embodiment, an information processing apparatus includes a storage device, a volatile memory, and a processor. The storage device includes a controller, a first nonvolatile storage module, and a second nonvolatile storage module whose access speed is higher than an access speed of the first nonvolatile storage module. The processor is configured to execute an operating system and a cache driver that are loaded into the volatile memory. The cache driver uses at least part of an area in the second nonvolatile storage module as a cache for the first nonvolatile storage module.