Hybrid Imager CCD CMOS Substrate Segmentation
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Solution Overview
Problem
Existing photon detection systems face challenges in combining the exceptional optical performance of Charge Coupled Device (CCD) photon detectors with the low power consumption and dense circuitry packaging of Complementary Metal Oxide Semiconductor (CMOS) technology, due to fundamental incompatibilities between the two processes, leading to high noise and poor image quality.
Innovation Solution
A hybrid imager system is developed, where a CCD photon detector on a first semiconductor substrate is interconnected with CMOS readout circuitry on a second substrate using mechanical and electrical bonding techniques, allowing for voltage signal transmission and amplification, and enabling multiple readings of charge packets to improve signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a CCD photon detector is used to achieve exceptional optical performance, then optical performance is improved, but power consumption increases
Solution Approach 1:
The system is divided into two separate substrates: a first substrate containing the CCD photon detector array and a second substrate containing the CMOS readout circuitry. This segmentation allows each component to be optimized for its specific function while avoiding the power consumption issues of integrating both on the same chip.
Solution Approach 2:
The readout circuitry is extracted from the CCD substrate and placed on a separate CMOS substrate. This removes the power-intensive serial shift registers from the CCD, allowing the CCD to operate in a lower power mode while maintaining exceptional optical performance.
2Use of energy by moving object
If CMOS technology is used to achieve low power consumption and dense circuitry packaging, then power consumption is reduced, but signal noise increases
Solution Approach 1:
By separating the photon detection function (CCD on first substrate) from the readout and processing functions (CMOS on second substrate), the system allows the CCD to generate low-noise signals while the CMOS handles power-intensive processing tasks that would otherwise add noise to the detection circuitry.
Solution Approach 2:
The patent introduces intermediate buffering and signal conditioning circuits between the CCD output and the CMOS readout circuitry. These intermediary elements maintain signal integrity and reduce noise while allowing the CMOS technology to provide low-power processing.
3Use of energy by moving object
If CCD and CMOS processes are integrated on a single substrate to combine optical performance and low power consumption, then both optical performance and power efficiency are improved, but manufacturing complexity increases
Solution Approach 1:
The system uses two separately fabricated substrates that are bonded together. This allows each substrate to be manufactured using its own optimized process (CCD process for the first substrate, CMOS process for the second substrate) without the need for complex multi-process integration on a single substrate.
Solution Approach 2:
The patent employs intermediary bonding interfaces and interconnection structures to join the two separately fabricated substrates. This intermediary approach allows the benefits of both CCD and CMOS processes to be combined while avoiding the manufacturing complexities of direct integration.
4Device complexity
If charge is read from the CCD detector only once to simplify the readout process, then device complexity is reduced, but signal quality deteriorates
Solution Approach 1:
The patent implements feedback mechanisms in the readout circuitry that allow multiple readings and measurements of the charge packets. The buffered voltage signals can be read multiple times through the CMOS circuitry, enabling signal averaging and noise reduction while maintaining relatively simple device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power dissipation in CCDs by extracting data at column outputs, providing a photon sensor system with improved optical performance and low power consumption, while maintaining signal integrity and noise reduction through buffered voltage signals and CMOS processing.
Implementation Method 1
charge coupled device (CCD) photon detector on a first semiconductor substrate that is associated with a sense node
Data Source
AI summary
The present invention relates to imaging systems that generally include at least a first substrate, on which a charge coupled device imaging sensor array is formed, and a second substrate on which readout circuitry is formed. Information related to the amount of light incident on pixels included in the imaging sensor array is passed to the readout circuitry as a voltage signal over an interconnection between the imaging sensor array and the readout circuitry. Accordingly, the readout circuitry may sample the output of the imaging sensor array multiple times. The system allows different processes to be used for forming the imaging sensor array and the readout circuitry, while also supporting multiple samples of information provided by the imaging sensor array.