Hybrid-Bonded Interposer for Parallel Die-to-Die Bandwidth
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Solution Overview
Problem
Existing semiconductor devices face limitations in bandwidth, latency, and power consumption due to the use of microbumps and serialization/deserialization circuitry in die-to-die interfaces, which constrain data transfer capabilities and heat dissipation.
Innovation Solution
Implementing a hybrid-bonded interposer with interposer vias and lateral metal traces to create high-density data paths between chips, allowing for parallel data transfer using flip-flops instead of serializer/deserializer circuitry, and enabling offset interfaces beyond JEDEC constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If microbumps and serialization/deserialization circuitry are used in die-to-die interfaces, then device complexity is reduced and ease of manufacture is improved, but bandwidth is limited and power consumption increases
Solution Approach 1:
The interface is segmented into multiple independent data lanes, each capable of parallel transmission. Instead of using a single high-speed serialized connection, the patent divides the data path into multiple lower-speed parallel channels, thereby increasing total bandwidth while maintaining manufacturing simplicity with standard flip-flop-based interfaces.
Solution Approach 2:
The patent transitions from a single-dimensional serialized data path to a multi-dimensional parallel architecture by adding multiple data lanes. This dimensional expansion allows simultaneous transmission of multiple data streams, effectively increasing bandwidth without requiring more complex serialization circuitry.
2Device complexity
If microbumps and serialization/deserialization circuitry are used in die-to-die interfaces, then device complexity is reduced, but latency increases and power consumption increases
Solution Approach 1:
By segmenting the data interface into multiple parallel lanes using simple flip-flops, the patent eliminates the need for complex serialization/deserialization operations that introduce latency. Each lane operates independently with minimal processing delay, reducing overall transmission latency while keeping device complexity low.
3Productivity
If connection density is increased to improve bandwidth, then bandwidth is improved, but heat dissipation becomes more difficult and manufacturing precision requirements increase
Solution Approach 1:
The interposer acts as an intermediary substrate that hosts the high-density connection array between the two chips. By placing the dense via structure on the interposer rather than directly on the chip edges, the patent achieves high connection density while maintaining relaxed manufacturing tolerances for chip fabrication and assembly.
4Ease of manufacture
If conventional die-to-die interfaces are used, then ease of manufacture is improved, but bandwidth is limited and connection density is limited
Solution Approach 1:
The patent creates multiple copies of the same simple flip-flop-based interface structure across multiple data lanes. By replicating the proven, easy-to-manufacture flip-flop interface design across numerous parallel channels, the system achieves high connection density while maintaining the manufacturing simplicity of conventional interfaces.
Data Source
AI summary
A semiconductor package includes a first chip including a first die-to-die interface with a first plurality of flip-flops, and a second chip including a second die-to-die interface with a second plurality of flip-flops, and an interposer configured to provide paths for data to flow between the first die-to-die interface and the second die-to-die interface. The interposer is mechanically coupled to the first chip and to the second chip by a first hybrid bond and a second hybrid bond, respectively, the interposer including a first plurality of interposer vias coupled to the first plurality of flip-flops across the first hybrid bond, a second plurality of interposer vias coupled to the second plurality of flip-flops across the second hybrid bond, and a plurality of lateral metal traces coupling respective vias among the first plurality of interposer vias to respective vias among the second plurality of interposer vias to provide the paths.