Hybrid I/Q DAC Core Mapping for Lower-Energy Cell Selection
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Solution Overview
Problem
Multi core hybrid I/Q digital to analog converters in mobile telecommunications consume excessive energy due to inefficient cell selection methods, where identical cores are often used for both I and Q components, leading to suboptimal energy usage.
Innovation Solution
Implementing a method to select cells asymmetrically by defining two groups of cores and using only cells from the first group for I-codes and only cells from the second group for Q-codes, with specific mapping algorithms to compute and distribute cells in ascending and descending orders within each group, thereby minimizing core overlap and maximizing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If identical cores are used for both I and Q components, then device complexity is reduced, but energy consumption increases
Solution Approach 1:
The patent divides the N cores into two distinct groups: first group cores (cores 1 to N/2) and second group cores (cores N/2+1 to N). This segmentation allows I-codes to use only first group cores while Q-codes use only second group cores, preventing simultaneous activation of identical cores and reducing energy consumption by up to 50%.
Solution Approach 2:
The patent implements asymmetric core allocation where I and Q components do not share the same cores. Instead of symmetric usage where both I and Q could use any core, the system creates an asymmetric distribution: I-codes are mapped to first group cores in ascending order while Q-codes are mapped to second group cores in descending order, eliminating core overlap and reducing power consumption.
2Ease of operation
If cells are selected symmetrically for I and Q codes, then device operation is simplified, but energy efficiency deteriorates
Solution Approach 1:
The patent applies asymmetric cell selection within each core group. For I-codes, cells are selected in ascending order from first group cores (core 1, then core 2, etc.), while for Q-codes, cells are selected in descending order from second group cores (core N, then core N-1, etc.). This asymmetric approach prevents both core and cell-level overlap, maximizing energy efficiency while maintaining operational simplicity through systematic selection rules.
Data Source
AI summary
A mapping circuit (300) for selecting cells of a multi core hybrid I/Q digital to analog converter includes a first sub-mapping circuit (310a) configured to define a first group of cores for each data symbol to be transmitted and to select cells of the first group of cores for an I-code of the data symbol to be transmitted. The mapping circuit (310b) further includes a second sub-mapping circuit configured to define a second group of cores for each data symbol and to select cells of the second group of cores for a Q-code of the data symbol.