Hybrid LDPC Decoding for Low-Complexity Error Correction

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Solution Overview

Problem

Existing LDPC decoders face limitations in correcting errors, with bit-flipping decoders being inefficient in certain scenarios and message passing decoders having high implementation complexity, necessitating a hybrid approach that combines the strengths of both while overcoming their limitations.

Innovation Solution

The hybrid message passing and bit flipping LDPC decoding technique involves generating and transmitting messages between variable nodes and check nodes, updating hard decision values based on unsatisfied check nodes and thresholds, thereby incorporating mechanisms of both bit flipping and message passing to improve decoding performance and reduce iteration count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If bit-flipping decoding is used, then implementation complexity is reduced, but error correction capability deteriorates in certain scenarios

Engineering Contradiction:
Improvedecoder complexityVSAvoiderror correction capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent combines bit-flipping decoding and message passing decoding into a hybrid decoder that switches between the two methods based on channel conditions and error patterns, thereby achieving both low complexity and high error correction capability

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If message passing decoding is used, then error correction capability is improved, but implementation complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoiddecoder complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic decoding approach where the decoder adapts its method (bit-flipping or message passing) based on real-time channel conditions and error patterns, optimizing performance while controlling complexity

Inventive Principle:
Principle #15Dynamics

3Reliability

If iterative decoding with multiple thresholds is used, then error correction performance is improved, but computational overhead increases

Engineering Contradiction:
Improvedecoding performanceVSAvoidcomputational overhead
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent segments the error correction process into distinct phases using multiple thresholds (first threshold for initial corrections, second threshold for additional corrections), allowing efficient handling of different error scenarios without excessive computational overhead

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9614548B1Systems and methods for hybrid message passing and bit flipping decoding of LDPC codes
Publication Date: 2017.04.04 MARVELL ASIA PTE LTD
  • US9614548B1 patent drawing
  • US9614548B1 patent drawing
  • US9614548B1 patent drawing

AI summary

Systems and methods are provided for iterative data decoding. Decoding circuitry receives a first message from a variable node at a check node. Decoding circuitry generates a second message based at least in part on the first message. Decoding circuitry transmits the second message to the variable node. Decoding circuitry updates a hard decision value of the variable node based at least in part on the first message and the second message.