Hybrid Leadframe Routing for Faster Custom Flip-Chip Packaging

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Solution Overview

Problem

The conventional leadframe (LF) design process for semiconductor devices is time-consuming and costly, requiring custom designs for each new IC die, which leads to high development costs and inefficiencies due to the need for iterative co-design processes and multiple die masks.

Innovation Solution

The use of a standard LF with additive manufactured metal traces and dielectric support material allows for the creation of custom LF designs by connecting printed metal traces to standard LF leads, enabling quick digital generation and fabrication of custom LFs, reducing the need for custom die masks and standardizing bump designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a custom leadframe design is created for each new IC die, then the device meets specific mechanical, thermal, and electrical requirements, but the development time and cost increase significantly

Engineering Contradiction:

Improvedevice performanceVSAvoiddesign time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The leadframe is divided into a standard portion (providing mechanical support and basic electrical connections) and a custom printed portion (providing application-specific routing). This segmentation allows the standard portion to be reused across different devices while only the printed portion needs customization, significantly reducing design time and cost.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The standard leadframe portion serves multiple functions across different IC die types, providing common mechanical support, bonding wire anchorage, and basic electrical interconnection. This universality eliminates the need to redesign the entire leadframe for each new IC die, reducing development time while maintaining device performance.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If a custom leadframe design is created for each new IC die, then the device meets specific mechanical, thermal, and electrical requirements, but the development cost increases

Engineering Contradiction:

Improvedevice performanceVSAvoiddesign cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The leadframe design transitions from completely custom metal stamping to a hybrid approach where only the trace routing parameters are customized through printing. This parameter change allows reuse of the standard leadframe structure while adapting only the necessary routing parameters for different applications, reducing manufacturing cost.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If iterative co-design processes are used for leadframe and IC die, then the device achieves optimal performance, but the development cycle extends

Engineering Contradiction:

Improvedevice performanceVSAvoiddesign efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The standard leadframe portion is pre-designed and optimized for general mechanical, thermal, and electrical performance. This preliminary action establishes a solid foundation that works for multiple IC die types, reducing the need for iterative co-design while maintaining optimal device performance through the customized printed routing layer.

Inventive Principle:

Principle #10Preliminary action

4Adaptability or versatility

If multiple die masks are used for custom bump layouts, then the IC die can be customized for different applications, but the manufacturing complexity and cost increase

Engineering Contradiction:

Improvebump layout flexibilityVSAvoidmask complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The leadframe routing is created through printing processes that can be digitally customized without requiring physical mask changes. This copying approach allows different bump layouts to be achieved through digital design files rather than multiple physical die masks, reducing manufacturing complexity while maintaining adaptability.

Inventive Principle:

Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the time and cost of LF design and fabrication, allows for flexible design and fabrication of LFs, and decreases the number of die masks required, while enabling efficient routing and thermal dissipation in semiconductor devices.

Implementation Method 1

an additive manufactured metal process that adds printed LF traces

Methodology Applied

Scientific EffectAdditive manufacturing: 3D Printing

Data Source

PatentUS12080633B2Custom leadframe from standard plus printed leadframe portion

Publication Date: 2024.09.03 TEXAS INSTRUMENTS INC

AI summary

A packaged semiconductor device includes an IC die having bump features that are coupled to bond pads flip chip attached to a custom LF. The custom LF includes metal structures including metal leads on at least 2 sides, and printed metal providing a printed LF portion including printed metal traces that connect to and extend inward from at least one of the metal leads over the dielectric support material that are coupled to FC pads configured for receiving the bump features including at least some of the printed metal traces coupled to the bond pads on the IC die. The IC die is flip chip mounted on the printed LF portion so that the bump features are connected to the FC pads.