Hybrid Low Dropout Regulator Circuit Design
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Solution Overview
Problem
Current Low Dropout Regulators (LDOs) face challenges in achieving good process migration performance, small occupied chip area, and small output ripple, with analog LDOs having poor process migration and large chip area, while digital LDOs have large output ripple and low response speed.
Innovation Solution
A hybrid low dropout regulator comprising a control circuit, digital regulator circuit, and analog regulator circuit, where the control circuit compares output voltage with threshold voltages to generate control signals for the digital and analog regulator circuits, adjusting output voltage to match a reference voltage and reducing output ripple through feedback current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If an analog LDO is used, then the output ripple is small and the response speed is high, but the process migration performance is poor and the occupied chip area is large
Solution Approach 1:
The LDO is divided into two independent regulator circuits: a digital regulator circuit and an analog regulator circuit. Each circuit handles different aspects of voltage regulation, allowing the system to achieve low output ripple without requiring a large chip area. The digital circuit handles coarse regulation while the analog circuit handles fine regulation, reducing the overall area required.
Solution Approach 2:
The patent combines digital and analog regulator circuits into a single hybrid LDO system. This merging allows the system to leverage the advantages of both digital (small area, good process migration) and analog (low ripple, high response speed) circuits, achieving a balance that neither circuit could achieve alone.
2Object-generated harmful factors
If an analog LDO is used, then the output ripple is small and the response speed is high, but the process migration performance is poor
Solution Approach 1:
The system segments the regulation function between digital and analog circuits. The digital regulator circuit provides robust voltage regulation with good process migration performance, while the analog regulator circuit specifically addresses output ripple reduction. This segmentation allows each circuit to be optimized for its specific function.
Solution Approach 2:
By merging digital and analog regulator circuits, the system achieves both good process migration performance (from the digital circuit) and low output ripple (from the analog circuit), resolving the contradiction between these two performance metrics.
3Area of stationary object
If a digital LDO is used, then the occupied chip area is small and the process migration performance is good, but the output ripple is large and the response speed is low
Solution Approach 1:
The regulation function is segmented between digital and analog circuits. The digital circuit handles the primary voltage regulation with high efficiency and small area, while the analog circuit specifically targets output ripple reduction, allowing the system to achieve low ripple without sacrificing the area advantages of digital design.
Solution Approach 2:
The hybrid architecture merges the area efficiency of digital LDOs with the low-ripple performance of analog LDOs, achieving a solution that maintains small chip area while significantly reducing output ripple compared to pure digital implementations.
4Area of stationary object
If a digital LDO is used, then the occupied chip area is small, but the response speed is low
Solution Approach 1:
The system segments the response function: the digital circuit provides fast initial response due to its high-speed switching capability, while the analog circuit provides continuous fine-adjustment response. This segmentation allows the system to achieve high overall response speed while maintaining the area advantages of digital design.
Solution Approach 2:
By merging digital and analog regulator circuits, the system achieves high response speed through the digital circuit's fast switching while maintaining small chip area, resolving the contradiction between response speed and area that plagues pure analog designs.
Data Source
AI summary
The embodiments of the present disclosure disclose a low dropout regulator and a method for controlling the same. The low dropout regulator comprises a control circuit configured to compare a output voltage with a first threshold voltage and a second threshold voltage, generate a first control signal when the output voltage is less than the first threshold voltage or greater than the second threshold voltage and a second control signal when the output voltage is greater than the first threshold voltage and less than the second threshold voltage; a digital regulator circuit configured to adjust the output voltage according to the first control signal and maintain the output voltage according to the second control signal; and an analog regulator circuit configured to output feedback current to the output terminal according to the output voltage and the reference voltage under the trigger of the second control signal.