Hybrid LTPS IGZO Gate Driver Circuit Leakage Current

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Solution Overview

Problem

Existing gate driving circuits in displays face challenges with leakage current in LTPS thin film transistors and inadequate on-state current in IGZO thin film transistors, necessitating a more effective and stable circuit solution.

Innovation Solution

Integration of polysilicon transistors, particularly LTPS, and metal oxide transistors, particularly IGZO, into a hybrid circuit for driving circuits and pixel units, optimizing their placement to leverage their respective advantages in reducing leakage current and enhancing on-state current performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If LTPS thin film transistors are used in gate driving circuits, then on-state current is improved, but leakage current increases

Engineering Contradiction:
Improveon-state currentVSAvoidleakage current
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The patent applies different semiconductor material types to different transistor positions within the circuit. Specifically, LTPS transistors are used in positions requiring high on-state current (such as driving transistors), while IGZO transistors are used in positions where low leakage current is critical (such as storage transistors). This local differentiation allows each transistor to be optimized for its specific functional requirement, resolving the contradiction between on-state current and leakage current at the system level.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent creates a hybrid circuit architecture that combines two different semiconductor material systems (LTPS and IGZO) within the same display device. This composite approach leverages the complementary strengths of each material: LTPS provides high carrier mobility and on-state current, while IGZO provides low off-state current. The hybrid configuration allows the circuit to achieve both high drive capability and low leakage simultaneously by appropriately assigning transistor types to different circuit nodes.

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If IGZO thin film transistors are used in gate driving circuits, then leakage current is reduced, but on-state current decreases

Engineering Contradiction:
Improveleakage currentVSAvoidon-state current
Core Design Contradiction:
Object-generated harmful factorsVSPower

Solution Approach 1:

The patent strategically places IGZO transistors in specific circuit positions where low leakage current is the primary requirement, such as storage transistors that need to maintain charge and switch transistors in off-states. In these local positions, the low off-state current characteristic of IGZO is maximized while the overall circuit performance is maintained through complementary LTPS transistors in positions requiring high drive current.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The hybrid circuit architecture combines IGZO and LTPS transistors to create a system where the weaknesses of IGZO (lower on-state current) are compensated by the strengths of LTPS (higher on-state current). The composite material approach allows the circuit to achieve low leakage current through IGZO transistors while maintaining adequate drive capability through LTPS transistors in critical driving positions.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS10559265B2Display
Publication Date: 2020.02.11 INNOLUX CORP
  • US10559265B2 patent drawing
  • US10559265B2 patent drawing
  • US10559265B2 patent drawing

AI summary

A display includes a substrate having a driver circuit with hybrid devices. The driver circuit includes first to fourth transistors. The first transistor includes a first control end connected to a clock signal, a first end connected to a high voltage, and a second end connected to a first node. The second transistor comprises metal oxide semiconductor, and includes a second control end connected to an input signal, a third end connected to a second node, and a fourth end connected to the first node. The third transistor comprises polysilicon semiconductor, and includes a third control end connected to the first node, and a fifth end connected to the high voltage, and a sixth end connected to an output voltage. The fourth transistor includes a fourth control end connected to the input signal, a seventh end connected to the third node, and an eighth end connected to the output voltage.