Hybrid Mask Pattern for High Aspect Ratio Electrode Stability

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Solution Overview

Problem

The increasing aspect ratio of cylindrical lower electrodes in semiconductor devices poses a challenge as they tend to fall or break before dielectric deposition, necessitating a method to enhance their stability and integration during the fabrication process.

Innovation Solution

A hybrid mask pattern method is employed, involving a silicon mask and a metal layer, where a coating layer with carbon is used to support the electrodes, and subsequent etching processes are optimized using the hybrid mask pattern to form contact holes and lower electrodes effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the aspect ratio of cylindrical lower electrodes is increased to maintain capacitance in miniaturized devices, then integration density is improved, but the electrodes fall down or break before dielectric deposition

Engineering Contradiction:
Improveintegration densityVSAvoidelectrode stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A coating layer comprising carbon is introduced as an intermediary substance between the lower electrode and the dielectric layer. This coating layer is formed to cover the lower electrode before dielectric deposition, providing mechanical support and preventing the electrode from falling or breaking during the fabrication process. The coating layer acts as a mediator that enables the electrode to maintain its high aspect ratio structure without failure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If a hybrid mask pattern including silicon mask and metal layer is used, then productivity is enhanced, but the fabrication process complexity increases

Engineering Contradiction:
Improvefabrication efficiencyVSAvoidmask pattern complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The mask pattern is segmented into multiple functional layers: a first mask pattern comprising silicon and a second mask pattern comprising metal. Each layer serves a specific purpose in the fabrication process, allowing for selective etching and deposition operations. This segmentation enables complex device structures to be formed through sequential processing steps, improving productivity despite the increased process complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hybrid mask pattern utilizes composite material structure combining silicon and metal layers. This composite approach leverages the advantageous properties of both materials - silicon provides good etch selectivity and metal provides structural support and conductivity. The composite mask pattern enables precise control over the fabrication process while maintaining electrode stability.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances productivity by stabilizing the electrodes and allowing for precise etching of insulating layers with high aspect ratios, reducing the risk of electrode failure and improving the integration density of semiconductor devices.

Implementation Method 1

forming a coating layer that includes carbon and that covers an upper surface of the insulating layer exposed through the first and second mask patterns, sidewalls of the first mask pattern, and the second mask pattern

Methodology Applied
Scientific EffectCarbon coating: Coatings

Implementation Method 2

etching the insulating layer using the first mask pattern and the metal layer as a mask

Methodology Applied
Scientific EffectEtching: Ablation

Data Source

PatentUS10607855B2Method for fabricating semiconductor device using a hybrid mask pattern
Publication Date: 2020.03.31 SAMSUNG ELECTRONICS CO LTD
  • US10607855B2 patent drawing
  • US10607855B2 patent drawing
  • US10607855B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming an insulating layer on a substrate; forming a first mask pattern including silicon on the insulating layer and forming a second mask pattern including an oxide on the first mask pattern; forming a coating layer that includes carbon and which covers an upper surface of the insulating layer, a sidewall of the first mask pattern, and the second mask pattern; removing a portion of the coating layer and the second mask pattern; forming a metal layer on an upper surface of the first mask pattern and on a sidewall of the coating layer; exposing the upper surface of the insulating layer by removing the coating layer; and etching the insulating layer by using the first mask pattern and the metal layer as a mask.